Field Effect Transistor Diagram: Pinouts, Symbols, and Circuit Selection

A field effect transistor (FET) diagram maps the Gate, Drain, and Source terminals to show how voltage at the Gate controls current flow between the Drain and Source. Unlike BJTs that are current-controlled, FETs are voltage-controlled, making them ideal for high-impedance logic interfacing. If you need a safe default part for 90% of DIY and hobbyist switching tasks: use the IRLZ44N (N-channel power MOSFET, 47A, 55V, logic-level) for loads over 1A, or the 2N7000 (N-channel signal MOSFET, 200mA, 60V) for low-power indicator LEDs and logic shifting.

Decoding the Field Effect Transistor Diagram: Symbols and Pinouts

When you look at a schematic, the FET symbol tells you everything about its behavior before you even read the part number. For the standard N-channel enhancement-mode MOSFET (the most common type in maker projects), the symbol consists of three main lines: the Gate (isolated from the channel by a gap), the Drain, and the Source.

The critical visual cue is the arrow on the Source pin. For an N-channel FET, the arrow points inward toward the channel. For a P-channel FET, it points outward. Another vital element often included in power MOSFET symbols is the body diode, drawn from the Source to the Drain. This parasitic diode is a physical byproduct of the silicon manufacturing process. It means current can always flow backward through the FET from Source to Drain, even when the Gate is off—a crucial factor when switching inductive loads like motors.

Operation Regions: Where the FET Actually Works

A common trap for beginners is confusing MOSFET terminology with BJT terminology. In a BJT, 'saturation' means fully ON. In a MOSFET, 'saturation' means acting as a constant current source (partially ON). When you want a MOSFET to act as a closed switch, you want it in the Linear (or Ohmic) region.

Note: V_th is the Gate threshold voltage. For a standard MOSFET, this might be 4V. For a 'logic-level' MOSFET, it is typically 1V to 2V, allowing direct drive from 3.3V microcontrollers.

The Decision Tree: Picking the Right FET for Your Circuit

Stop guessing based on what is in your parts bin. Use this decision path to select the exact silicon you need.

Application Circuit: Driving a 12V DC Motor with an ESP32

Let's build a complete, robust low-side switch for a 12V, 2A DC cooling fan using an ESP32 (3.3V logic) and an IRLZ44N. This circuit includes all necessary protection components often missing from basic tutorials.

Component List and Values

• Q1: IRLZ44N N-channel MOSFET
• R1 (Gate Resistor): 100Ω (Limits inrush current into the Gate capacitance, protecting the ESP32 GPIO pin from overcurrent spikes).
• R2 (Pulldown Resistor): 10kΩ (Bleeds off static charge and ensures the FET stays OFF during ESP32 boot-up when pins are floating).
• D1 (Flyback Diode): 1N5819 Schottky diode (Clamps inductive voltage spikes when the motor turns off).

Wiring Steps

1. Connect the ESP32 GPIO pin to one leg of the 100Ω resistor (R1).
2. Connect the other leg of R1 to the Gate of the IRLZ44N.
3. Connect the 10kΩ pulldown resistor (R2) between the Gate and Source (Ground).
4. Connect the Source pin directly to the shared system Ground (ESP32 GND and 12V power supply GND must be bonded).
5. Connect the Drain pin to the negative wire of the 12V DC motor.
6. Connect the positive wire of the motor to the 12V power supply positive rail.
7. Place the 1N5819 diode in parallel with the motor: the cathode (stripe) to the motor positive, and the anode to the motor negative (Drain pin).

Failure Modes and Multimeter Testing

MOSFETs rarely fail gracefully. They typically fail in one of three ways: Gate punch-through (ESD destroys the thin oxide layer, causing a short between Gate and Source), Avalanche breakdown (inductive spike exceeds V_DSS, shorting Drain to Source), or Thermal runaway (insufficient gate drive leaves the FET in the linear region, generating massive heat until the silicon melts).

You can verify a MOSFET's health on the bench using a standard digital multimeter (DMM) in Diode Test Mode.

The 4-Step DMM Test (N-Channel)

1. Discharge the Gate: Touch the Gate and Source pins together with your finger or a piece of wire. This bleeds off any stored charge in the gate capacitance.
2. Test the Body Diode: Place the Red probe on the Source and the Black probe on the Drain. You should read a standard diode drop (typically 0.4V to 0.6V). Reverse the probes (Red on Drain, Black on Source); the meter should read 'OL' (Open Loop).
3. Check for Drain-Source Short: Keep the Red probe on Drain and Black on Source. If it reads near 0.00V or beeps continuously, the FET has suffered avalanche breakdown and is dead.
4. Test Gate Charge (Turn it ON): While keeping the Black probe on the Source, touch the Red probe to the Gate for one second. This applies the DMM's internal ~3V test voltage to the gate, charging it. Now move the Red probe back to the Drain. The meter should now read near 0.00V (or beep), indicating the channel has turned ON and current is flowing. Short Gate to Source again to turn it off.

Safe Default Part Numbers for the Workbench

Stocking your lab with the right FETs prevents project delays. Here are the definitive defaults for 2026, avoiding the common trap of buying standard-level FETs for logic-level circuits.

For deeper theoretical background on FET construction and transconductance curves, refer to the All About Circuits semiconductor textbook. When reviewing specific thermal limits and safe operating area (SOA) graphs for your power designs, always pull the latest datasheet directly from the manufacturer, such as the TI IRLZ44N product page.