The EX OR (Exclusive OR) gate symbol represents a fundamental digital logic gate that outputs a HIGH (1) only when its inputs are at different logic levels. If both inputs are HIGH or both are LOW, the output is LOW. On schematics, you will encounter two primary representations: the curved D-shape defined by US standards, and the rectangular block defined by international standards. Recognizing the correct EX OR gate symbol and understanding its physical IC pinout is critical for debugging logic circuits, designing parity checkers, and building half-adders.
The Complete EX OR Gate Symbol & Truth Table Reference
Before tracing a board or drawing a schematic, lock in the baseline logic and visual identifiers. The table below maps the Boolean behavior to the physical symbols you will see on engineering drawings.
| Parameter | Value / Description |
|---|---|
| Boolean Expression | Y = A ⊕ B (or Y = A'B + AB') |
| ANSI/IEEE Symbol | D-shaped body with a curved back; double-curved input lines (resembles an OR gate with an extra curve at the inputs). |
| IEC 60617 Symbol | Rectangular block with the text =1 inside, indicating the output is HIGH when exactly one input is HIGH. |
| Input A = 0, B = 0 | Output Y = 0 (LOW) |
| Input A = 0, B = 1 | Output Y = 1 (HIGH) |
| Input A = 1, B = 0 | Output Y = 1 (HIGH) |
| Input A = 1, B = 1 | Output Y = 0 (LOW) |
| Propagation Delay (Typical 5V CMOS) | ~14 ns (e.g., 74HC86) |
Regional Standards: ANSI/IEEE vs. IEC 60617
Logic symbols are not universal; the drafting standard depends on the region and the legacy of the engineering firm. Misinterpreting these can lead to wiring a standard OR gate when an XOR was intended.
ANSI/IEEE Std 91 (North America & Legacy Schematics)
The American National Standards Institute (ANSI) and IEEE use the 'distinctive shape' method. The EX OR gate symbol here is derived from the standard OR gate (a D-shape with a pointed nose and curved back). To distinguish it as 'Exclusive', a second curved line is drawn parallel to the input side of the gate. If you are reading schematics from US-based defense contractors, older automotive ECUs, or North American university textbooks, this is the symbol you will see.
IEC 60617-12 (Europe, UK, and Modern Global Designs)
The International Electrotechnical Commission (IEC) mandates rectangular envelopes for all logic gates. The EX OR gate is drawn as a simple rectangle with the qualifier =1 printed inside. This means 'the output is active when exactly one input is active.' This standard scales much better for complex programmable logic controller (PLC) diagrams and modern FPGA block diagrams. If you are working with Siemens, ABB, or modern European automotive harnesses, rely on the =1 rectangle.
Rows People Get Wrong: Truth Table and Pinout Mistakes
When debugging a logic fault or wiring a breadboard, engineers frequently misread specific rows of the truth table or misalign the physical IC pins. Here are the most common errors:
- The '1,1' Row Confusion: Beginners often assume an EX OR gate behaves like a standard OR gate for the final row of the truth table. Remember:
1 OR 1 = 1, but1 EX-OR 1 = 0. If your circuit is locking up when both inputs go HIGH, you likely need a standard OR gate (74HC32), not an XOR. - Missing the Inversion Bubble (XNOR): On schematics, a small circle (bubble) on the output nose of the EX OR symbol flips the logic entirely, creating an Exclusive NOR (XNOR) gate. If the symbol has a bubble, the output is HIGH when inputs match (0,0 and 1,1). Failing to notice this 1mm circle on a dense PCB schematic is a top cause of inverted logic bugs.
- Pin 14 vs Pin 7 Power Alignment: In a standard 14-pin DIP XOR IC (like the 74HC86), Pin 14 is VCC and Pin 7 is GND. A frequent breadboard mistake is shifting the chip by one row, applying 5V to an input pin and grounding VCC. This will instantly overheat the silicon and destroy the gate array.
- Floating Inputs: CMOS XOR gates have incredibly high input impedance. If you leave Input A unconnected (floating) while testing Input B, ambient electromagnetic noise will cause the gate to oscillate randomly. Always tie unused XOR inputs to GND or VCC via a 10kΩ pull-down/pull-up resistor.
Identifying Faded or Missing XOR Gates on a PCB
When repairing vintage synthesizers, industrial relay boards, or salvaged telecom gear, the silkscreen marking the IC part number is often faded, scraped off, or obscured by conformal coating. Here is how to safely identify an EX OR gate when the physical markings are missing.
- Locate Power Rails: Use a multimeter in continuity mode. Find the ground plane (usually connected to the chassis or large copper pours). Identify the VCC pin (typically 5V or 3.3V). For 14-pin SOIC or DIP packages, VCC is almost always Pin 14 and GND is Pin 7.
- Trace the Pin Groups: A quad XOR IC contains four independent gates. The remaining 12 pins will be grouped into four sets of three (Input A, Input B, Output Y). Trace the copper runs to confirm this 3-pin topology.
- Inject Logic and Map: Power the board safely. Using a logic probe or a microcontroller outputting known 0/1 states, inject signals into two suspected input pins while monitoring the third pin with your oscilloscope or multimeter. If the output toggles HIGH only when the inputs differ, you have confirmed an EX OR gate.
- Check the Datasheet Topology: Open the internal block diagram of suspected ICs. A standard CMOS XOR gate requires roughly 24 transistors internally. If you are probing a discrete transistor logic board (RTL/DTL from the 1970s), look for a multi-stage network of NAND/NOR gates configured to simulate the XOR Boolean expression, as dedicated XOR ICs were rare and expensive in that era.
Decision Path: Which XOR IC Should You Use?
If you are designing a new circuit or replacing a dead chip, selecting the right XOR integrated circuit depends on your voltage domain and speed requirements. Use the decision matrix below to terminate your part selection.
| Condition / Requirement | Recommended Logic Family | Specific Part Number |
|---|---|---|
| Standard 5V breadboard prototypes, Arduino/AVR interfacing, educational kits. | 74HC (High-Speed CMOS) | SN74HC86N (DIP) or SN74HC86D (SOIC) |
| Modern 3.3V microcontrollers (ESP32, STM32, Raspberry Pi Pico) where 5V tolerance is absent. | 74LVC (Low-Voltage CMOS) | SN74LVC86A |
| Wide voltage range (3V to 15V), battery-powered analog synths, or CD4000-series legacy replacements. | 4000 Series CMOS | CD4030BE |
| Ultra-high speed, RF logic, or sub-nanosecond propagation delay requirements. | 74ECL / 74LVDS | MC100EP07 (ECL) or SN74LVDS86 |
The Final Verdict
For 95% of bench work, DIY digital logic, and microcontroller interfacing, default to the Texas Instruments SN74HC86. It offers the best balance of wide availability (under $0.50 per unit in single quantities), forgiving 2V-to-6V operating range, and standard pinouts that map directly to almost every legacy schematic you will encounter. If your design strictly runs at 3.3V and interfaces directly with an ESP32, pivot to the SN74LVC86A to avoid logic-level translation headaches. For comprehensive internal schematics and exact timing diagrams, always verify against the Texas Instruments SN74HC86 Datasheet before finalizing your PCB layout.
Understanding the EX OR gate symbol is more than memorizing a shape; it is about recognizing the physical behavior of phase detection and parity generation in hardware. Whether you are reading an IEC =1 block on a German PLC print or tracing the double-curved ANSI symbol on a 1980s arcade board, the underlying Boolean truth remains identical. Keep your truth table memorized, tie your unused inputs to a defined rail, and your logic will hold.
