The Feedback Loop: Electrical Resistance vs Temperature Basics
In power electronics, heat is not just a byproduct; it is an active variable that alters circuit behavior. The relationship between electrical resistance vs temperature creates a feedback loop that dictates whether your design runs reliably or destroys itself. For most conductive materials used in electronics—copper PCB traces, aluminum bond wires, and the silicon channels in MOSFETs—resistance increases as temperature rises. This is known as a Positive Temperature Coefficient (PTC).
Consider a copper trace carrying 10A. At 20°C, its resistance might be 10 mΩ, dissipating 1W ($I^2R$). If poor ventilation allows the trace to reach 100°C, the electrical resistance vs temperature drift (roughly +3,900 ppm/°C for copper) pushes the resistance to ~13 mΩ. The dissipation is now 1.3W. That extra 0.3W generates more heat, which increases resistance further. In high-current silicon devices like power MOSFETs, the $R_{DS(on)}$ tempco can be even more aggressive, often doubling between 25°C and 150°C. If the heatsink cannot extract heat faster than this escalating $I^2R$ loss generates it, the device enters thermal runaway.
While the PTC of $R_{DS(on)}$ theoretically helps balance steady-state current in parallel MOSFETs (the hotter device gets higher resistance, shedding current to cooler siblings), the gate threshold voltage ($V_{GS(th)}$) has a Negative Temperature Coefficient (NTC). During high-frequency switching, the hotter MOSFET turns on faster and hogs the switching losses, often leading to localized thermal failure. Always match gate drive resistances and use tight thermal coupling when paralleling.
Thermal Path Math: Junction-to-Ambient Rθ and Derating
To prevent thermal runaway, you must model the thermal path from the silicon junction to the surrounding air. We use thermal resistance ($R_{\theta}$), measured in °C/W, which functions exactly like electrical resistance in Ohm's Law, where temperature difference ($\Delta T$) is voltage, and power dissipation ($P_D$) is current.
The governing equation for junction temperature ($T_J$) is:
T_J = T_A + P_D × (R_θJC + R_θCS + R_θSA)
| Variable | Description | Example Value (TO-220) |
|---|---|---|
| $T_A$ | Ambient Temperature (inside enclosure) | 40°C |
| $R_{\theta JC}$ | Junction-to-Case (from datasheet) | 1.5°C/W |
| $R_{\theta CS}$ | Case-to-Sink (thermal interface material) | 0.5°C/W (Sil-Pad 400VO) |
| $R_{\theta SA}$ | Sink-to-Ambient (heatsink performance) | Variable (Target < 4°C/W) |
Interpreting the Derating Curve
Every power semiconductor datasheet includes a power derating curve. Take the ubiquitous IRF3205 N-channel MOSFET. Its absolute maximum junction temperature ($T_{J(max)}$) is 175°C, and it is rated for 200W at a case temperature ($T_C$) of 25°C. However, the derating factor is 1.33 W/°C.
If your thermal math dictates the case will sit at 100°C, you must derate the maximum allowable power:
P_max = 200W - [(100°C - 25°C) × 1.33 W/°C] = 100.25W
If your circuit attempts to dissipate 120W at a 100°C case temperature, the silicon will exceed 175°C and fail, regardless of what the front-page "200W" headline in the datasheet claims. For long-term reliability, design to the derated curve and aim for a maximum $T_J$ well below the absolute limit.
Heatsink Selection: Sizing for Real-World Wattage
Let’s size a heatsink for a TO-220 MOSFET dissipating a continuous 15W inside an enclosure where $T_A$ peaks at 40°C. We want to keep $T_J$ under 125°C to ensure a long operational lifespan.
Step 1: Calculate Required $R_{\theta SA}$
125°C = 40°C + 15W × (1.5°C/W + 0.5°C/W + R_θSA)
85°C = 15W × (2.0°C/W + R_θSA)
5.66°C/W = 2.0°C/W + R_θSA
R_θSA = 3.66°C/W
Step 2: Select the Hardware
A standard stamped TO-220 heatsink like the Wakefield-Vette 680-25ABP offers roughly 11°C/W in natural convection—far too high. Even a larger extruded profile like the Aavid (Boyd) 507322B00000G yields about 4.5°C/W in still air, which would result in a $T_J$ of 137.5°C.
To hit our 3.66°C/W target without buying a massive, expensive extrusion, we introduce forced convection. Adding a 40mm fan, such as the Sunon MF40101VX (moving ~10 CFM), drops the effective $R_{\theta SA}$ of the Aavid extrusion by roughly 50%, bringing it down to ~2.2°C/W.
Step 3: Verify the New $T_J$
T_J = 40°C + 15W × (2.0°C/W + 2.2°C/W) = 103°C
At 103°C, the design is robust. According to thermal management principles outlined by Analog Devices, keeping the junction below 110°C drastically reduces long-term degradation mechanisms.
What Airflow and Enclosure Changes Buy You
If you cannot use a fan, you must alter the enclosure thermodynamics. Natural convection relies on the chimney effect; air must enter low and exit high. If your enclosure is sealed, the localized $T_A$ inside will quickly rise above the room ambient, invalidating your 40°C assumption. Adding louvered vents directly below and above the heatsink fins can drop internal ambient by 10°C to 15°C, which mathematically buys you the same thermal headroom as a much larger heatsink.
Failure Signatures: How Hot is Too Hot?
How hot is too hot for this part? While silicon survives up to 150°C or 175°C, the surrounding packaging does not age gracefully at those extremes. The Arrhenius equation dictates that the operational lifespan of electronic components halves for every 10°C rise in temperature above the baseline. For a 10-year design life, you should target $T_J$ < 100°C.
When the electrical resistance vs temperature feedback loop wins and thermal limits are breached, failure signatures manifest in specific ways:
- Solder Joint Creep and Fatigue: Repeated thermal cycling causes the coefficient of thermal expansion (CTE) mismatch between the silicon die, copper leadframe, and PCB to mechanically tear the solder joints. You will see micro-cracks under the TO-220 leads or BGA balls, leading to intermittent high-resistance connections that generate even more localized heat.
- Die-Attach Delamination: The epoxy or solder bonding the silicon die to the copper tab degrades. This creates a microscopic air gap, causing $R_{\theta JC}$ to spike invisibly. The case feels cool to the touch, but the junction is cooking.
- Electromigration: At high current densities and elevated temperatures (>125°C), metal atoms in the silicon interconnects physically migrate, eventually bridging gaps and causing hard short circuits.
- Gate Punch-Through: In MOSFETs, extreme heat increases leakage current exponentially. This can trigger parasitic BJT turn-on within the MOSFET structure, resulting in a catastrophic drain-to-source short and the release of "magic smoke."
FAQ: Electrical Resistance vs Temperature in Practice
Why does electrical resistance increase with temperature in copper traces?
At the atomic level, as copper heats up, its lattice ions vibrate more vigorously (increased phonon activity). These vibrations scatter the free electrons flowing through the conductor, impeding their path. This increased scattering manifests macroscopically as higher electrical resistance. For standard PCB copper, expect a ~0.4% increase in resistance for every 1°C rise above 20°C.
Can I use the electrical resistance vs temperature drift to measure current?
Technically yes, but practically it is a poor choice for precision measurement. Because the resistance of a standard copper trace or silicon channel drifts with ambient temperature and self-heating, your current reading will be highly inaccurate. If you need to measure current via voltage drop, use a dedicated shunt resistor with a very low Temperature Coefficient of Resistance (TCR), such as a Bourns CRE or Vishay WSL series metal-strip shunt, which holds its resistance stable (often ±50 ppm/°C) across a wide thermal range.
How does the electrical resistance vs temperature curve affect NTC thermistors?
Unlike copper and silicon channels, NTC (Negative Temperature Coefficient) thermistors are engineered from semiconductor ceramics where increased thermal energy frees up more charge carriers, lowering the resistance. This makes them ideal for temperature sensing and inrush current limiting. However, if an NTC thermistor is used for inrush limiting and does not have adequate airflow to cool down after the initial power-on surge, its resistance will remain low, allowing excessive steady-state current to flow and potentially overheating the downstream power supply.
