Electrical Resistance Temperature Effects: Thermal Runaway and Heatsink Sizing

The Electrical Resistance Temperature Loop: Why Heat Breeds Heat

When designing power circuits, thermal management is often treated as an afterthought—something to solve by bolting on a larger piece of aluminum. But at the silicon and copper level, heat fundamentally alters the electrical behavior of your components. The electrical resistance temperature coefficient (TCR) dictates that as a conductor or semiconductor heats up, its resistance changes. For most metals, including the copper traces on your PCB and the bond wires inside an IC, resistance increases linearly with temperature. Copper’s TCR is approximately +3930 ppm/°C, meaning a trace will exhibit roughly 40% more resistance at 125°C than at 25°C.

In power semiconductors like MOSFETs, this effect is even more pronounced. The on-state resistance ($R_{DS(on)}$) of a silicon N-channel MOSFET typically doubles between 25°C and 125°C. This creates a dangerous positive feedback loop: higher junction temperature increases $R_{DS(on)}$, which increases $I^2R$ conduction losses, which generates more heat, further driving up the temperature. If your thermal path cannot dissipate this escalating wattage, the component enters thermal runaway and ultimately fails.

Thermal Path Math and Real-World Derating

To prevent thermal runaway, you must model the heat flow from the silicon junction to the surrounding air. This is done using thermal resistance ($R_{\theta}$), measured in °C/W. The total thermal path is the sum of the junction-to-case ($R_{\theta JC}$), case-to-sink ($R_{\theta CS}$), and sink-to-ambient ($R_{\theta SA}$) resistances.

The governing equation for junction temperature ($T_J$) is:

T_J = T_A + P_D × (R_θJC + R_θCS + R_θSA)

Where $T_A$ is ambient temperature and $P_D$ is the power dissipated (calculated using the hot $R_{DS(on)}$).

Interpreting the Derating Curve

Every power component datasheet includes a power derating curve. This graph shows the maximum allowable power dissipation as ambient temperature rises. For a standard TO-220 MOSFET rated at 100W at 25°C case temperature, the derating slope is typically around 0.57 W/°C. By the time your enclosure ambient reaches 100°C, the absolute maximum power you can safely push through that silicon drops to roughly 42W. If your circuit demands 50W at 100°C ambient, the part will exceed its 175°C junction limit and destruct, regardless of how massive your heatsink is, because the bottleneck has shifted to the $R_{\theta JC}$ internal bond wires.

Heatsink Selection and Airflow: Sizing for the Worst Case

Let’s apply the math to a real-world scenario. You are designing a motor controller using an IRF540N MOSFET switching 15A continuous. The enclosure ambient ($T_A$) will reach 45°C in the summer. At 125°C, the MOSFET’s $R_{DS(on)}$ is roughly 0.077Ω. Your conduction loss ($P_D$) is $15^2 × 0.077 = 17.3W$.

We want to keep the junction temperature ($T_J$) below 135°C to ensure long-term reliability, leaving a 40°C safety margin below the 175°C absolute max.

135 = 45 + 17.3 × (1.0 + 0.5 + R_θSA)
90 = 17.3 × (1.5 + R_θSA)
5.20 = 1.5 + R_θSA
R_θSA = 3.70 °C/W

You need a heatsink with a sink-to-ambient thermal resistance of 3.70 °C/W or lower. If you rely on natural convection (0 LFM airflow) inside a sealed enclosure, you would need a massive, expensive extruded profile like the Aavid Thermalloy 577102B03300G, which sits around 5.5 °C/W naturally—meaning it fails our requirement.

What Airflow and Enclosure Changes Buy You

This is where forced air and enclosure venting change the physics. Introducing a standard 40mm brushless fan pushing 200 Linear Feet per Minute (LFM) of air across the fins drastically alters the boundary layer of stagnant air. Under 200 LFM, that same Aavid 577102B03300G drops its $R_{\theta SA}$ to approximately 2.8 °C/W, easily clearing our 3.70 °C/W target.

If you cannot use a fan, you must change the enclosure. Sealed NEMA enclosures trap heat, effectively raising your local $T_A$ by 10°C to 15°C above room ambient. Adding passive louvered vents at the bottom and top of the enclosure creates a chimney effect, restoring natural convection paths and dropping the internal ambient back toward room temperature. According to Texas Instruments' thermal design guidelines, optimizing the PCB copper pour connected to the drain/tab can also act as a secondary planar heatsink, shaving 10 to 15 °C/W off the total system thermal resistance in low-power applications.

Failure Signatures: How Hot is Too Hot?

Silicon itself can survive up to 175°C or even 200°C for short transients, but the packaging and surrounding materials cannot. "How hot is too hot" depends entirely on the failure mechanism you are trying to avoid.

• Solder Creep and Fatigue (>100°C): Standard Sn63/Pb37 or SAC305 lead-free solder loses significant mechanical shear strength above 100°C. If a heavy TO-247 component gets hot and the board experiences vibration, the solder joints will creep and eventually crack, leading to intermittent thermal connections and catastrophic arcing.
• Electromigration (>125°C): At high current densities and elevated temperatures, metal atoms in the silicon's aluminum or copper interconnects are physically pushed along by the electron wind. Over thousands of hours, this causes voids (open circuits) or hillocks (short circuits). This is the primary reason commercial silicon is derated to a 125°C maximum continuous operating junction temperature, despite a 175°C absolute limit.
• Die Attach Delamination (>150°C): The solder or epoxy bonding the silicon die to the copper leadframe degrades. Moisture trapped in the epoxy package expands, causing the "popcorn effect," where the package literally cracks open.

The ultimate failure signature of unmanaged electrical resistance temperature stress is a shorted gate-to-drain junction. When the silicon melts or the bond wires fuse, the MOSFET fails "on." In a half-bridge motor driver, this results in shoot-through, destroying the opposing FET and often vaporizing the PCB traces. Always design your thermal path to keep the continuous junction temperature below 125°C, and use the hot $R_{DS(on)}$ value to ensure your math reflects reality, not just the 25°C datasheet ideal.