If you need to amplify the voltage difference between two signals while ignoring the noise common to both, you need a differential amp circuit. While integrated op-amps handle this internally, building a discrete version on the bench is the fastest way to understand common-mode rejection, tail currents, and transistor matching. This guide walks through the exact topology, calculates real component values for a 12V supply, and provides a concrete decision tree for selecting your architecture.
The Core Topology: Nodes, Currents, and Why We Use It
The foundational discrete differential amp circuit is the long-tailed pair. It consists of two identical NPN transistors (Q1 and Q2) with their emitters tied together.
- Input Nodes (Vin1, Vin2): The bases of Q1 and Q2. These receive the signals to be compared.
- Output Nodes (Vc1, Vc2): The collectors of Q1 and Q2. The differential output is the voltage difference between these two nodes (Vout = Vc2 - Vc1).
- Tail Node (Vtail): The shared emitter connection. This node is critical; its voltage dictates the biasing of both transistors.
- Tail Resistor (Rtail): Connects Vtail to ground (or a negative supply), setting the total constant current (I_tail) flowing through the pair.
Why this topology over a single-ended common-emitter amplifier? A single-ended amp amplifies everything at its base, including 60Hz mains hum and ground bounce. The differential pair exploits symmetry. If noise hits Vin1 and Vin2 equally (common-mode signal), both transistors conduct equally, and the voltage difference between Vc1 and Vc2 remains zero. This is quantified as the Common-Mode Rejection Ratio (CMRR). For a deeper mathematical breakdown of CMRR in discrete pairs, refer to the All About Circuits semiconductor textbook.
Design Walkthrough: Picking Real Component Values
Let us design a practical differential amp circuit powered by a single 12V DC supply (Vcc = 12V). Our goal is a balanced quiescent state with maximum symmetrical voltage swing at the collectors.
1. Setting the Tail Current (I_tail)
We will target a total tail current of 2mA. In a perfectly balanced state, this splits equally: Ic1 = Ic2 = 1mA.
2. Sizing the Collector Resistors (Rc1, Rc2)
To maximize output swing, the quiescent collector voltage (Vc) should sit at roughly half the supply voltage (Vcc / 2 = 6V).
Using Ohm's Law: Rc = (Vcc - Vc) / Ic
Rc = (12V - 6V) / 1mA = 6,000 ohms.
The closest standard E12 resistor value is 5.6kΩ. With 5.6kΩ, our actual quiescent Vc will be 12V - (1mA * 5.6kΩ) = 6.4V. This is perfectly acceptable.
3. Sizing the Tail Resistor (Rtail)
We need to bias the bases at Vcc / 2 (6V) to allow AC signals to swing symmetrically. Assuming a standard Vbe drop of 0.7V, the Vtail node will sit at 6V - 0.7V = 5.3V.
Rtail = Vtail / I_tail
Rtail = 5.3V / 2mA = 2,650 ohms.
The closest standard value is 2.7kΩ.
4. Base Biasing Network
Use a simple voltage divider (two 100kΩ resistors) from Vcc to GND to generate the 6V base bias. Tie both bases to this 6V node through 10kΩ base-stopper resistors to prevent high-frequency oscillation. Place a 10µF bypass capacitor from the 6V divider node to ground to ensure it remains an AC ground for common-mode signals.
Discrete 2N3904 transistors will have slight Vbe mismatches, causing an input offset voltage. Furthermore, as one transistor heats up, its Vbe drops, stealing current from the other (thermal runaway). Clip the flat faces of Q1 and Q2 together using a small binder clip, or bind them with thermal compound and heat shrink, to force them to share the same thermal mass.
Behavior Matrix and Failure-Mode Contrast
Understanding how a differential amp circuit reacts to component drift or catastrophic failure is crucial for troubleshooting. Below is the behavior matrix for our 12V design.
| Element Changed / Failed | Effect on Vc1 / Vc2 | Effect on Differential Gain & CMRR |
|---|---|---|
| Rc1 increases to 10kΩ | Vc1 drops to ~2V; Vc2 stays at 6.4V. | Gain becomes asymmetrical. CMRR degrades severely due to unbalanced collector impedances. |
| Q1 Base-Emitter Shorted | Vtail drops to ~0V. Vc1 rises to 12V (Q1 cuts off). Vc2 drops to ~1V (Q2 saturates). | Differential action destroyed. Circuit acts as a single saturated switch. |
| Rtail Open Circuit | I_tail drops to 0mA. Both Vc1 and Vc2 rise to 12V. | Total failure. No current flows; gain is zero. |
| Vin1 and Vin2 tied together | Vc1 and Vc2 track each other identically. | Differential gain is zero. This is the intended common-mode test state. |
Failure-Mode Contrast: Differential vs. Single-Ended
In a standard single-ended common-emitter amplifier, an open bias resistor simply cuts off the single transistor, yielding Vcc at the collector. The failure is localized. In our differential amp circuit, the shared Vtail node couples the failure modes. If Q1 experiences a base-emitter short, it does not just fail locally; it pulls the Vtail node down to ground, actively robbing Q2 of its required Vbe bias and forcing Q2 into cutoff. The symmetric parallel signal path means a failure in one leg actively sabotages the other.
Decision Tree: Choosing Your Architecture
Not every application requires a discrete transistor build. Use this decision matrix to select the right differential amp circuit architecture for your specific project constraints.
| If your project requires... | Then choose this architecture... | Concrete Part Number |
|---|---|---|
| Learning transistor physics, audio preamps, or deliberate even-harmonic distortion. | Discrete BJT Long-Tailed Pair (as designed above). | 2N3904 (or MAT04 for precision matching) |
| General-purpose utility buffering, active filters, or driving ADCs on a breadboard. | Dual JFET-input Op-Amp wired as a difference amplifier. | TL072 (Low noise, wide bandwidth) |
| Reading Wheatstone bridges, shunt current sensors, or thermocouples where >100dB CMRR and zero offset trimming are mandatory. | Integrated Instrumentation Amplifier (internal matched laser-trimmed resistors). | INA128 (or AD620) |
Default Recommendation: If you are building a sensor interface for a microcontroller (like reading a load cell with an ESP32), do not waste time trimming discrete resistors. Terminate your design path with the INA128. It provides a single-resistor gain setting and guarantees the CMRR that discrete circuits struggle to achieve. For pure educational bench work or guitar pedal input stages, stick to the 2N3904 discrete pair.
Step-by-Step Breadboard Testing and Verification
Once wired, do not just apply a signal and hope for the best. Follow this verification sequence using a digital multimeter (DMM) and a dual-channel oscilloscope. For more on oscilloscope measurement techniques for differential signals, see the TI Precision Labs op-amp training series.
- Verify Quiescent Bias (Power On, Inputs Grounded via 10kΩ):
Set your DMM to DC voltage. Measure Vtail. It should read approximately 5.3V. Measure Vc1 and Vc2. Both should read between 6.0V and 6.8V. If Vc1 and Vc2 differ by more than 200mV, your transistors are severely mismatched or wired incorrectly. - Common-Mode Rejection Test:
Tie Vin1 and Vin2 together. Connect a function generator to this shared node and output a 1kHz sine wave at 1Vpp. Probe Vc1 and Vc2 with your oscilloscope. Both collector waveforms should move in perfect unison. If you measure the differential output (Vc2 minus Vc1) using the scope's math function (Ch2 - Ch1), the resulting waveform should be a flat line near 0V. Any residual 1kHz ripple is your common-mode gain error. - Differential-Mode Gain Test:
Disconnect the shared input. Apply a 10mVpp 1kHz sine wave to Vin1, and tie Vin2 to AC ground (via a 10µF capacitor). Probe Vc1. You should see an inverted, amplified sine wave. Calculate the single-ended gain: Av = Vout_peak / Vin_peak. With our 5.6kΩ collector resistors and a dynamic emitter resistance (re') of roughly 26 ohms per transistor, expect a single-ended voltage gain of approximately Rc / (2 * re') = 5600 / 52 ≈ 107 V/V. - Calculate CMRR:
CMRR (in dB) = 20 * log10 (Differential Gain / Common-Mode Gain). Measure the common-mode gain from Step 2 (it will be a small fraction, e.g., 0.05). If your differential gain is 107 and common-mode gain is 0.05, your CMRR is 20 * log10(2140) ≈ 66 dB. This is typical for an untrimmed discrete pair.
By following this exact topology, utilizing standard E12 resistor values, and systematically verifying the node voltages, you transition the differential amp circuit from an abstract textbook diagram to a predictable, measurable bench instrument.
