Mastering the Discharging Capacitor Equation: Derivation, Rearrangements, and Bench Examples

The discharging capacitor equation defines how voltage, current, and charge decay exponentially when a charged capacitor is connected across a resistive load. The foundational formula for voltage decay is V(t) = V₀ × e^(-t/RC). This relationship governs everything from 555 timer astable circuits and microcontroller reset delays to high-voltage DC bus bleeder networks in solar inverters. Below is the complete mathematical breakdown, algebraic rearrangements, and the exact unit-tracking workflows required to apply it on the bench without blowing up your prototype or failing a safety audit.

The Core Discharging Capacitor Equation and Symbol Definitions

When a capacitor discharges through a resistor, the rate of voltage drop is proportional to the remaining voltage. This yields the classic first-order differential equation solution for voltage over time:

V(t) = V₀ × e^(-t / τ)   where   τ = R × C

According to Georgia State University HyperPhysics, this exponential decay means the capacitor never theoretically reaches exactly zero volts, but drops by approximately 63.2% of its remaining value during every time constant (τ).

Rearranged Forms: Solving for Time, Resistance, and Capacitance

On the bench, you rarely just solve for V(t). Usually, you have a safety constraint (e.g., "must discharge to 50V in 10 seconds") and need to size the bleeder resistor. Here are the algebraic rearrangements of the discharging capacitor equation, isolated for each variable:

• Solving for Time (t):
  t = -R × C × ln( V(t) / V₀ )
  Use case: Calculating how long a DC bus takes to reach a safe touch voltage after power-off.
• Solving for Resistance (R):
  R = -t / ( C × ln( V(t) / V₀ ) )
  Use case: Sizing a bleeder resistor to meet a specific discharge time mandate.
• Solving for Capacitance (C):
  C = -t / ( R × ln( V(t) / V₀ ) )
  Use case: Determining maximum allowable parasitic capacitance on a high-speed data line.
• Solving for Initial Voltage (V₀):
  V₀ = V(t) / e^(-t / RC)   or   V₀ = V(t) × e^(t / RC)
  Use case: Forensics—calculating the original charge voltage based on a measured voltage after a known delay.

Assumptions, Boundary Conditions, and Unit Traps

The discharging capacitor equation is elegant, but it models an idealized lumped-element circuit. Before plugging numbers into your calculator, verify these assumptions hold true for your physical build:

When the Formula Applies (and When It Doesn't)

The equation assumes a constant resistance and a pure capacitance. It breaks down in circuits with significant parasitic inductance (ESL), such as snubber networks across switching MOSFETs, where the discharge becomes an underdamped RLC ringing waveform rather than a smooth exponential decay. It also assumes the resistor value remains static; if you use a thermistor or a wirewound resistor that heats up significantly during the discharge pulse, the resistance will drift, altering the time constant dynamically.

The #1 Bench Killer: Unit Mismatches

The most common reason a calculated discharge time fails on the bench is mixing prefix units without converting to base SI units. The natural logarithm and Euler's number require the exponent (-t / RC) to be strictly dimensionless.

Realistic Answer Magnitudes

What should your answer look like? In digital logic and RF decoupling, τ is measured in nanoseconds to microseconds. In audio crossover networks, it is in milliseconds. In power electronics (like VFD DC buses or camera flash circuits), τ ranges from 1 to 60 seconds. If you calculate a bleeder resistor value and the resulting time constant is 4,000 seconds for a 400V bus, your resistor is too large and poses a lethal shock hazard.

Worked Bench Problems: Step-by-Step with Unit Tracking

Let’s run two practical scenarios, explicitly tracking the unit conversions and intermediate calculation steps.

Problem 1: Finding Voltage at a Specific Time

Scenario: A 1000 µF filter capacitor charged to 50V is discharged through a 10 kΩ bleeder resistor. What is the voltage across the capacitor after 5 seconds?

1. Convert to base units:
   C = 1000 µF = 1000 × 10⁻⁶ F = 0.001 F
R = 10 kΩ = 10 × 10³ Ω = 10,000 Ω
2. Calculate the time constant (τ):
   τ = R × C = 10,000 Ω × 0.001 F = 10 seconds
3. Apply the discharging capacitor equation:
   V(5) = 50 × e^(-5 / 10)
V(5) = 50 × e^(-0.5)
4. Solve the exponential:
   e^(-0.5) ≈ 0.60653
V(5) = 50 × 0.60653 = 30.32 V

Result: After 5 seconds (half of one time constant), the voltage has dropped to 30.32 V.

Problem 2: Finding Time to Reach a Safe Threshold

Scenario: A 400V DC bus uses a 470 µF capacitor bank and a 220 kΩ bleeder resistor. How long does it take to discharge to a safe touch voltage of 50V?

1. Convert to base units:
   C = 470 µF = 0.00047 F
R = 220 kΩ = 220,000 Ω
2. Calculate τ:
   τ = 220,000 × 0.00047 = 103.4 seconds
3. Use the rearranged time formula:
   t = -τ × ln( V(t) / V₀ )
t = -103.4 × ln( 50 / 400 )
t = -103.4 × ln( 0.125 )
4. Solve the natural log:
   ln(0.125) ≈ -2.07944
t = -103.4 × -2.07944 = 215.01 seconds

Result: It takes approximately 215 seconds (3 minutes and 35 seconds) for the bus to reach 50V. (Note: As detailed in Electronics Tutorials, reaching ~1% of initial voltage takes about 5τ, which here would be 517 seconds).

Real-World Scenario: When the Math Meets the Bench (and Fails)

Theoretical equations assume ideal components. Here is a real-world engineering scenario where the discharging capacitor equation gave the "right" math, but the physical prototype failed the safety audit.

The Setup

We were designing a bleeder network for an 800V DC solar inverter bus. The safety mandate required the bus to discharge from 800V to under 60V within exactly 30 seconds of grid disconnect. The bus capacitance was specified as 2200 µF (nominal).

The Numbers

Using the rearranged equation for Resistance:
R = -t / ( C × ln( V(t) / V₀ ) )
R = -30 / ( 0.0022 × ln( 60 / 800 ) )
R = -30 / ( 0.0022 × -2.5902 )
R = -30 / -0.005698 = 5265 Ω
We selected a standard 5.1 kΩ, 50W wirewound bleeder resistor to provide a slightly faster discharge than the mathematical minimum.

The Outcome

During prototype testing, we disconnected the AC mains and started a stopwatch. The voltage dropped rapidly at first, but the "tail" of the discharge dragged. It took 48 seconds to cross the 60V threshold, failing the 30-second safety spec by a massive margin.

What Went Wrong

The math was perfect; the component assumptions were flawed. Two physical realities broke the ideal equation:

1. Distributed RC and ESR: The 2200 µF bank wasn't a single ideal film capacitor. It was a series-parallel matrix of six aluminum electrolytic capacitors. Electrolytics have significant Equivalent Series Resistance (ESR). The bank behaved as a distributed RC ladder. The bulk capacitance discharged quickly through the ESR into the parallel branches, but the final 10% of the discharge was bottlenecked by the internal ESR and parallel leakage paths of the individual cells, stretching the effective time constant at low voltages.
2. Thermal Derating of the Resistor: Dumping the energy of an 800V, 2200 µF capacitor (E = 0.5 × C × V² = 704 Joules) into a 5.1 kΩ resistor in 30 seconds generates massive instantaneous heat. The wirewound resistor's core temperature spiked past 200°C. Wirewound elements typically have a positive temperature coefficient (PTC) of +200 to +400 ppm/°C. At 180°C above ambient, the resistor's actual value increased by roughly 6%, pushing the resistance to ~5.4 kΩ mid-discharge and artificially lengthening the time constant.

The Fix: We abandoned the single-resistor approach. We switched to a 4.7 kΩ fixed resistor in series with a high-voltage NTC thermistor, and physically separated the bleeder from the capacitor bank to reduce ambient heating. More importantly, we designed for a 20-second mathematical target to provide a physical buffer for ESR tail-end effects, ensuring the hardware reliably hit the 30-second safety mandate.