A diode circuit is any electrical configuration that exploits the asymmetric conductivity of a semiconductor PN junction to enforce directional current flow, clamp voltage spikes, or rectify alternating waveforms. While textbook definitions often stop at the half-wave rectifier, the most practical and universally useful configuration for makers, embedded engineers, and solar designers is the Dual-Source Diode OR-ing Circuit (also known as a power multiplexer or redundancy path).
If you need to power a load from two separate sources—like a wall adapter and a backup battery—without them back-feeding into each other, this is the foundational topology you use. Below, we break down the exact node behavior, size real components for a 12V/2A system, and analyze exactly how this circuit fails when pushed to its limits.
The Dual-Source Diode OR-ing Topology
The OR-ing circuit uses two diodes with their anodes connected to separate power sources and their cathodes tied together to feed a common load. The semiconductor physics are simple: the diode connected to the higher voltage source will forward-bias and conduct, while the lower-voltage diode remains reverse-biased, effectively blocking current from flowing backward into the weaker source.
To understand the exact behavior on the bench, we map this to four specific nodes:
- Node A: Anode of Diode 1 (connected to Source 1)
- Node B: Anode of Diode 2 (connected to Source 2)
- Node C: Common Cathode junction (connected to the Load)
- Node D: Common Ground return for both sources and the load
The following behavior table assumes we are using standard silicon diodes (like the 1N4007, with a forward voltage drop $V_f \approx 0.7V$) versus Schottky diodes (like the 1N5819, $V_f \approx 0.3V$ to $0.5V$). This table dictates exactly what your multimeter will read at Node C under different source conditions.
| V1 (Node A) | V2 (Node B) | V_Load (Node C) | Active Current Path | D1 State | D2 State & PIV |
|---|---|---|---|---|---|
| 12.0V | 0V (GND) | 11.3V (Si) / 11.5V (Schottky) | V1 → D1 → Load | Forward Biased | Reverse Biased (11.3V PIV) |
| 0V (GND) | 12.0V | 11.3V (Si) / 11.5V (Schottky) | V2 → D2 → Load | Reverse Biased (11.3V PIV) | Forward Biased |
| 12.0V | 12.0V | 11.3V (Si) / 11.5V (Schottky) | V1 & V2 (Shared based on source impedance) | Forward Biased | Forward Biased |
| 12.0V | 10.0V (Sagging Battery) | 11.3V (Si) / 11.5V (Schottky) | V1 → D1 → Load | Forward Biased | Reverse Biased (1.3V PIV) |
Notice the fourth row. This is the critical OR-ing threshold. Even though Source 2 is still outputting 10V, it is completely isolated from the load because Node C is being held at 11.3V by Source 1. Diode 2 sees a reverse bias (Peak Inverse Voltage, or PIV) of roughly 1.3V across its junction, keeping it safely non-conductive.
Diode OR-ing vs. Ideal MOSFET OR-ing
Why choose a basic diode circuit over an active MOSFET OR-ing topology (using P-channel FETs like the SI2301 or dedicated ICs like the TI TPS2114)? The answer comes down to the trade-off between voltage drop and system complexity.
| Criterion | Standard Diode OR-ing | P-Channel MOSFET OR-ing |
|---|---|---|
| Voltage Drop at 2A | 0.5V - 0.7V (Loss of 1W - 1.4W) | ~0.1V (Loss of 0.2W, based on Rds(on)) |
| Component Cost (BOM) | $0.05 - $0.15 per path | $0.30 - $1.50+ per path (FET + driver) |
| Reverse Leakage Current | Negligible (µA range) | Higher (body diode and gate leakage quirks) |
| Thermal Management | Requires heatsinking or copper pours at >1A | Runs cool, easily handles >3A in SOT-23 |
Choose Diode OR-ing when: You are designing a high-voltage system (e.g., 24V or 48V solar/battery setups) where a 0.5V drop is a negligible 1-2% efficiency loss, or when you need absolute zero reverse-leakage for ultra-low-power sleep states. As noted in All About Circuits' semiconductor fundamentals, the simplicity of the PN junction guarantees fail-safe isolation without requiring auxiliary gate-drive power.
Choose MOSFET OR-ing when: You are multiplexing 3.3V or 5V logic rails where a 0.7V silicon diode drop would cause a brownout, or when load currents exceed 3A and diode heat dissipation becomes unmanageable on a compact PCB.
Design Walkthrough: Sizing Real Components for 12V/2A
Let's design a robust OR-ing circuit for a 12V nominal system pulling a continuous 2A load (like a router or a small linear actuator). We need to select the right diode chemistry and package.
1. Select the Diode Chemistry:
We will use Schottky diodes to minimize the voltage drop and heat. A standard silicon 1N4007 would drop 0.7V to 1.0V at 2A, wasting up to 2W as heat. A Schottky diode drops roughly 0.45V to 0.55V at this current.
2. Calculate Power Dissipation:
$P = V_f \times I = 0.5V \times 2A = 1.0W$.
A standard DO-41 through-hole package (like the 1N5819) is only rated for ~1.25W total dissipation and will run dangerously hot (often exceeding 100°C junction temp) in a stagnant air enclosure. We must step up to a TO-220 package.
3. Pick the Exact Part Number:
We select the MBR1045 (10A, 45V Schottky in a TO-220 package). Even though our load is only 2A, the 10A rating ensures the forward voltage curve remains flat, and the TO-220 package can easily dissipate 1W without a heatsink (thermal resistance junction-to-ambient is roughly 60°C/W, meaning a 1W rise is only 60°C above ambient—well within the 150°C max junction limit).
4. Verify Peak Inverse Voltage (PIV):
If Source 1 is 14.4V (alternator/charger) and Source 2 is 0V (disconnected), D2 must block 14.4V. The MBR1045 has a 45V PIV rating, providing a safe 3x derating margin.
Schottky diodes have a negative temperature coefficient for forward voltage. As they get hot, their $V_f$ drops, which causes them to draw more current if paralleled, leading to thermal runaway. Never parallel two Schottky diodes to increase current capacity without adding small ballast resistors (e.g., 0.05Ω) in series with each anode to force current sharing.
Failure Mode Analysis: What Breaks at the Extremes?
Understanding how a diode circuit fails is just as important as knowing how it works. Diodes typically fail in one of two ways: short-circuit (thermal meltdown of the junction) or open-circuit (bond wire lift-off). Here is the failure-mode contrast for the OR-ing topology.
| Component Failure | Physical Cause | System Consequence | Required Protection |
|---|---|---|---|
| D1 Fails Short | Overcurrent / Thermal junction meltdown | Catastrophic Cross-feed. Source 1 and Source 2 are now directly connected. If V1 is a 14V wall wart and V2 is a 3S LiPo (12.6V), the wall wart will forcefully overcharge the LiPo, risking fire. | Series fuses on both Node A and Node B inputs. |
| D1 Fails Open | Mechanical shock / Bond wire fatigue | Loss of Redundancy. The load continues to operate normally off Source 2, but the system is now running on a single point of failure. No immediate danger. | Add a monitoring optocoupler across D1 to trigger a 'Source 1 Fault' LED. |
| Load Shorts to GND | Wiring error / Component failure downstream | Diode Overcurrent. Both D1 and D2 will attempt to dump maximum short-circuit current into the fault. Diodes will overheat and eventually fail short. | Place a single PTC resettable fuse or standard glass fuse at Node C before the load. |
According to Texas Instruments' power multiplexing guidelines, relying solely on the diode junction to survive a dead short is poor practice. Always size your upstream fuses to blow before the diode's $I^2t$ (melting integral) rating is exceeded.
Step-by-Step Breadboard Testing & Verification
Before committing this topology to a printed circuit board, validate the OR-ing threshold and voltage drops on a solderless breadboard. Note: Breadboard contacts are rated for roughly 1A to 2A max. For this test, we will use a 10Ω load resistor to draw approximately 1.1A at 11V, keeping us safely within breadboard limits.
- Prepare the Components: Insert two MBR1045 Schottky diodes into the breadboard. Ensure the silver cathode band on both diodes faces the same direction (toward the load side).
- Wire the Anodes (Nodes A & B): Connect the anode of D1 to Bench Power Supply 1. Connect the anode of D2 to Bench Power Supply 2. Ensure both bench supplies share a common ground (Node D).
- Tie the Cathodes (Node C): Use a jumper wire to connect the cathodes of D1 and D2 together on the same breadboard rail. Connect your 10Ω, 5W load resistor between this common cathode rail and the common ground rail.
- Test Single-Source Operation: Turn on Supply 1 to 12.0V. Leave Supply 2 off (0V). Set your digital multimeter (DMM) to DC Voltage. Measure between Node C and Ground. You should read approximately 11.4V to 11.5V, confirming the Schottky $V_f$ drop.
- Test the OR-ing Handoff: Turn on Supply 2 to 10.0V. The voltage at Node C should remain at ~11.4V. Now, slowly increase Supply 2. The moment Supply 2 exceeds ~11.9V (accounting for its own diode drop), the voltage at Node C will begin to rise, proving D2 has forward-biased and taken over the load.
- Verify Reverse Isolation: Set Supply 1 to 12V and Supply 2 to 0V. Switch your DMM to measure voltage directly across Diode 2 (Red probe on Node B, Black probe on Node C). You should read a negative voltage (approx -11.4V), confirming D2 is successfully reverse-biased and blocking current.
If Source 2 is a Lithium-Ion or LiFePO4 battery pack, never test the 'Diode Fails Short' scenario on a live bench without a fuse. A shorted OR-ing diode will allow an unregulated wall adapter to push unlimited current into the battery's BMS, potentially bypassing charge protection and causing thermal venting. Always use an inline 5A automotive blade fuse on the battery positive lead when prototyping.
By understanding the exact node voltages, selecting the correct TO-220 Schottky package for your thermal envelope, and respecting the reverse-isolation limits, the dual-source diode circuit remains one of the most reliable, bulletproof power management topologies in the electrical engineer's toolkit.






