A discharging capacitor circuit, commonly called a bleed network, safely dissipates stored energy from a DC bus after power is removed. Without it, a 400V motor drive or audio amplifier power supply can hold a lethal charge for hours. For a standard 400V DC bus with 1000µF of capacitance, a 30kΩ, 10W wirewound resistor placed in parallel will discharge the bus to a safe 50V in roughly 62 seconds, meeting NEC-style safety guidance while keeping continuous power dissipation manageable.

This guide walks through the exact topology, the math behind component selection, failure modes at the extremes, and a low-voltage breadboard protocol to verify your time constant before you scale up to mains or high-voltage DC.

The Core Topology: Passive Bleed vs. Active Discharge

The standard discharging capacitor circuit uses a passive topology. The resistor (R_bleed) is wired directly in parallel with the bus capacitor (C_bus).

  • Node A (V_BUS): The positive high-voltage rail.
  • Node B (GND): The negative rail or chassis ground.
  • C1 (C_bus): Connected between Node A and Node B.
  • R1 (R_bleed): Connected between Node A and Node B, physically mounted as close to C1's terminals as possible to prevent trace inductance or accidental opens.
Why passive over active? An active discharge circuit uses a MOSFET and a control IC to switch a low-value resistor across the capacitor only when power drops. While active circuits waste zero steady-state power, they introduce a fatal flaw: if the control IC loses auxiliary power or the MOSFET gate driver fails, the capacitor remains fully charged. A passive bleed resistor is inherently fail-safe. If the system dies, the resistor keeps working.

Design Walkthrough: Sizing R_bleed for a 400V DC Bus

Let's design a passive discharging capacitor circuit for a 400V nominal DC bus with 1000µF of total bulk capacitance. Our target is to discharge from 400V down to 50V (the standard shock-hazard threshold cited in NFPA 70 / NEC Article 460 for power capacitors) within 60 seconds.

The discharge formula is: V(t) = V₀ × e^(-t / RC)

Rearranging to solve for R:
R = -t / (C × ln(V_t / V₀))

  1. Plug in the targets: t = 60s, C = 0.001F, V_t = 50V, V₀ = 400V.
  2. Calculate the natural log: ln(50 / 400) = ln(0.125) = -2.0794.
  3. Solve for R: R = -60 / (0.001 × -2.0794) = 28,854Ω.
  4. Select standard value: Choose the next standard E24 value up to ensure we meet the time target: 30kΩ.

With 30kΩ, the actual time to 50V is 62.4 seconds. Next, we must calculate the continuous power dissipation while the system is running:

P = V² / R = 400² / 30,000 = 5.33 Watts

Running a resistor at its absolute maximum rating will cause thermal degradation and eventual open-circuit failure. We apply a 50% derating rule for wirewound resistors in free air. 5.33W / 0.5 = 10.66W.

The Concrete Pick: The Vishay RS01030K00FE12 (RS-10 series, 30kΩ, 10W, silicone-coated wirewound). At 5.33W, it runs at 53% load. While slightly above the strict 50% derating, the RS-10 series is rated for 10W at up to 70°C ambient in free air, making it a robust, real-world choice that avoids the physical bulk of a 15W chassis-mount unit.

Behavior Matrix: Parameter Shifts and Extremes

Understanding how component tolerances and environmental shifts affect your discharging capacitor circuit is critical for reliability. Here is how the circuit behaves when elements change.

Parameter Changed Effect on Discharge Time Effect on Steady-State Power System Risk / Consequence
R_bleed increases by 10% (tolerance) Increases to ~68s Drops to 4.8W Minor; still meets most 1-minute safety windows.
C_bus increases (added caps in parallel) Increases proportionally No change Fails safety discharge window; requires lower R_bleed.
V_BUS spikes to 450V (transient) Initial voltage higher, time to 50V increases Jumps to 6.75W Resistor runs hotter; verify transient surge rating.
Ambient temp exceeds 70°C No change No change Resistor must be derated; risk of thermal open-circuit.

Failure Mode Contrast: What Breaks at the Extremes

When designing for high voltage, you must design for the failure of the safety components themselves. Series and parallel assumptions change drastically when a component catastrophically fails.

Extreme 1: R_bleed Fails Open

This is the most common failure mode for cheap carbon-film resistors subjected to high-voltage surges. The resistor silently stops conducting. The discharging capacitor circuit is effectively removed. When a technician opens the chassis an hour later, the 400V bus is fully charged, presenting a lethal shock hazard. Mitigation: Always use wirewound or thick-film high-voltage resistors, and physically inspect the solder joints during annual maintenance.

Extreme 2: R_bleed Fails Short

If a resistor internally shorts (rare in wirewound, possible in some cracked ceramic compositions), it places a dead short across V_BUS and GND. The main DC bus will experience a massive fault current. If the upstream breaker or fuse doesn't clear instantly, the PCB traces will vaporize, and the electrolytic capacitor will vent explosively. Mitigation: Use resistors with a proven open-only failure mode under overload, and ensure the upstream DC bus is protected by high-interrupting-capacity (HRC) fuses.

Safety Caveat: Never rely solely on a bleed resistor for personal safety before touching a DC bus. A discharging capacitor circuit is an engineering control, not a procedural lockout. Always use a rated high-voltage probe or a dedicated discharge stick to verify 0V before making physical contact.

Breadboard-Test Protocol: Low-Voltage Proxy

Do not test a 400V discharge circuit on a solderless breadboard. The parasitic capacitance, contact resistance, and arc-flash risk make it dangerous. Instead, build a scaled low-voltage proxy to verify your time constant math and multimeter sampling rate.

Step Action Expected Measurement / Result
1 Insert a 1000µF electrolytic capacitor and a 30kΩ 1/4W resistor in parallel on the breadboard. Components secure; polarity observed on capacitor.
2 Connect a 12V DC bench supply across the network. Let it charge for 10 seconds. Multimeter reads 12.0V across the capacitor.
3 Disconnect the 12V supply. Start a stopwatch simultaneously. Voltage begins dropping immediately.
4 Record the time it takes to drop to 4.35V (which is 12V × e^-1, representing one time constant τ). Time should be ~30 seconds (τ = R × C = 30k × 1000µ).
5 Record the time to drop to 0.15V (approx 5τ, fully discharged). Time should be ~150 seconds.

If your measured τ deviates by more than 10% from 30 seconds, check your multimeter's input impedance. Cheap DMMs have 1MΩ input impedance, which will act as a parallel bleed resistor and skew your low-voltage test results. Use a DMM with >10MΩ input impedance for accurate RC timing measurements, as detailed in standard RC discharge circuit theory.

Decision Tree: Choosing Your Discharge Strategy

Use this decision matrix to finalize your discharging capacitor circuit topology based on your specific power budget and safety requirements.

System Constraint Topology Choice Component Strategy
Continuous power waste must be < 1W, strict efficiency required. Active Discharge (MOSFET switched) Use a dedicated supervisor IC (e.g., TPS3808) to trigger a 1kΩ resistor via a high-voltage MOSFET upon AC loss.
System is >600V, high reliability, no auxiliary logic available. Passive Bleed (Series-Parallel Matrix) Use four 120kΩ 5W resistors in a 2S2P matrix to yield 120kΩ / 20W, distributing heat and voltage stress.
Standard industrial drive (<600V), cost-sensitive, fail-safe mandated. Passive Bleed (Single Resistor) Single high-wattage wirewound resistor, derated to 50-60% load.

Default Recommendation: For 90% of hobbyist, audio, and standard industrial motor drive applications operating between 100V and 500V DC, the single-resistor passive topology is the correct choice. It eliminates logic dependencies, survives control-board brownouts, and provides a predictable, mathematically verifiable discharge curve. Stick to the Vishay RS-10 series (30kΩ, 10W) or an equivalent silicone-coated wirewound part, mount it with adequate airflow, and physically route it directly across the capacitor terminals to eliminate trace-break risks.