A DC-DC power supply converts one direct current voltage level to another. If your load draws under 50mA and requires ultra-low noise (like an RF front-end or precision ADC), use a linear regulator (LDO). For any load above 100mA, or any application requiring step-up (boost) or wide-range step-down (buck) conversion, a switching topology is mandatory to prevent thermal runaway and maximize battery life.
This guide cuts through the datasheet jargon to give you the exact topology selection criteria, thermal derating math, and component values needed to design a robust switching regulator for 12V/24V/48V embedded and power systems.
Topology Showdown: Linear vs. Switching DC-DC Converters
Choosing between linear and switching topologies comes down to four variables: efficiency, heat dissipation, output noise, and board space. Linear regulators burn excess voltage as heat, while switching regulators use inductors and capacitors to transfer energy in high-frequency pulses.
| Topology | Efficiency | Heat Dissipation | Output Noise (Ripple) | Relative Cost & Space |
|---|---|---|---|---|
| Linear (LDO) | Low ($V_{out}/V_{in}$). E.g., 5V/24V = 20% | Extremely High. $P_{loss} = (V_{in} - V_{out}) \times I_{load}$ | Ultra-low (<1mV p-p) | Lowest cost, smallest footprint (no inductor) |
| Buck (Step-Down) | High (85% - 96%) | Low. Scales with switching and conduction losses | Moderate (10mV - 30mV p-p) | Medium cost, requires inductor and diode/sync FET |
| Boost (Step-Up) | High (85% - 94%) | Moderate. Diode conduction losses can be significant | High. Discontinuous output current requires heavy filtering | Medium cost, requires high-voltage rated output caps |
| Buck-Boost | Medium (80% - 90%) | Moderate to High. Four internal FETs switching | High. Complex switching nodes | Highest cost, largest footprint (2 inductors or 1 large coupled inductor) |
The Verdict: For a 24V solar battery system stepping down to 5V at 2A, a linear regulator would dissipate $(24V - 5V) \times 2A = 38W$ of heat—requiring a massive, impractical heatsink. A synchronous buck converter operating at 92% efficiency will only dissipate roughly 0.87W, easily managed by the PCB copper.
Design Example: 24V to 5V/3A Synchronous Buck Converter
Let's design a non-isolated buck converter for an industrial IoT gateway powered by a 24V nominal (18V-32V) battery bank. We need a stable 5.0V rail capable of delivering 3A continuous current.
Component Selection and Headroom Math
We will use the Texas Instruments LMR33630, a 36V, 3A synchronous buck converter. It features an integrated high-side and low-side MOSFET, minimizing external component count.
- Input Voltage ($V_{in}$): 24V nominal (18V to 32V max transient)
- Output Voltage ($V_{out}$): 5.0V
- Output Current ($I_{out}$): 3.0A
- Switching Frequency ($f_{sw}$): 400 kHz (selected to keep the inductor physically small while maintaining high efficiency)
Headroom & Dropout Check: The LMR33630 has a minimum on-time ($t_{on(min)}$) of roughly 60ns. At 400 kHz, the switching period is 2.5µs. The maximum duty cycle is $D_{max} = 1 - (t_{off(min)} / T_{sw}) \approx 98\%$. The dropout voltage at 3A is approximately 0.4V. Since our minimum $V_{in}$ (18V) is well above $V_{out} + V_{dropout}$ (5.4V), we have ample headroom. The regulator will easily maintain regulation even during heavy battery voltage sag.
Passive Component Calculations
| Component | Calculated Value | Selected Part / Spec | Design Notes |
|---|---|---|---|
| Inductor ($L$) | 9.8 µH | 10 µH, 5A sat, shielded ferrite (e.g., Würth 74437349100) | Targeting 30% ripple current ($\Delta I_L = 0.9A$). Shielded core prevents EMI coupling to nearby traces. |
| Output Cap ($C_{out}$) | 141 µF min | 3 × 47 µF, 10V, X7R Ceramic (0805 package) | X7R dielectric exhibits DC bias derating. Three 47µF caps yield ~110µF effective capacitance at 5V bias, satisfying transient response. |
| Bootstrap Cap ($C_{boot}$) | 100 nF | 100 nF, 16V, X7R Ceramic (0402) | Must be placed as close to the BOOT and SW pins as possible to minimize parasitic inductance. |
| Feedback Resistors | $R_{top} = 63.4k\Omega$, $R_{bot} = 10k\Omega$ | 1% tolerance, 0402 package | Sets $V_{out} = 0.8V \times (1 + R_{top}/R_{bot}) = 5.07V$. Use 1% or better to avoid DC offset errors. |
Thermal Management and Derating Reality Checks
Datasheets often quote junction-to-ambient thermal resistance ($\theta_{JA}$) based on an idealized, multi-layer JEDEC test board. On your actual 2-layer or 4-layer PCB, thermal performance will differ. You must calculate the real-world junction temperature ($T_J$) to ensure the IC doesn't trigger internal thermal shutdown (typically at 150°C).
The Thermal Math:
Output Power: $P_{out} = 5V \times 3A = 15W$
Assumed Efficiency ($\eta$) at 24V/5V/3A: 88% (from datasheet curves)
Total Power Loss: $P_{loss} = P_{out} \times (\frac{1}{\eta} - 1) = 15W \times (\frac{1}{0.88} - 1) = 2.04W$
The LMR33630 comes in a SOIC-8 package with an exposed thermal pad. On a standard 4-layer board with 2oz copper pours on the top and inner layers connected by thermal vias, the effective $\theta_{JA}$ is approximately 25°C/W.
Temperature Rise: $\Delta T = P_{loss} \times \theta_{JA} = 2.04W \times 25°C/W = 51°C$
If maximum ambient temperature ($T_A$) inside your enclosure is 50°C:
$T_J = T_A + \Delta T = 50°C + 51°C = 101°C$
Input Protection and Ripple Expectations
A DC-DC power supply connected to a battery bus or long wire harness is vulnerable to transients, reverse polarity, and reflected ripple.
Input Protection Network
For a 24V nominal system, transients can easily exceed 40V during load dumps. Protect the $V_{in}$ pin with a SMAJ33A TVS diode (clamps at 53.3V, safely below the LMR33630's 40V absolute max rating—wait, if the IC is 36V max, we need a tighter clamp. Use a SMAJ26A which clamps at 42.1V, or better, a 33V rated IC like the LMR36030 if 36V is too close to the 24V+transient range. Let's specify a TVS that clamps below the IC max: SMAJ24A clamps at 38.9V, suitable for a 36V-max IC if transients are brief, but for continuous safety, use an IC rated to 42V+ or add a front-end Zener clamp). For reverse polarity, avoid a standard series diode (which wastes 1.5W at 3A). Instead, use an ideal diode controller like the LM74610-Q1 driving an N-channel MOSFET, dropping the reverse-polarity loss to under 50mW.
Ripple and Noise Expectations
Switching regulators generate output voltage ripple dictated by the inductor ripple current ($\Delta I_L$) and the Equivalent Series Resistance (ESR) of the output capacitors.
$\Delta V_{ESR} = \Delta I_L \times ESR_{total}$
With our 0.9A inductor ripple current and three parallel X7R ceramic capacitors (each with ~3mΩ ESR, total ESR = 1mΩ):
$\Delta V_{ESR} = 0.9A \times 0.001\Omega = 0.9mV$ peak-to-peak.
Adding the capacitive ripple component, expect a total output ripple of 8mV to 15mV p-p at the switching frequency. This is exceptionally clean for a switching supply and perfectly adequate for digital logic, microcontrollers, and most analog sensors. If you are powering a 24-bit ADC or an RF synthesizer, follow this buck stage with a high-PSRR LDO (like the TPS7A47) to scrub the remaining switching hash.
DC-DC Power Supply FAQ
Can I use a switching DC-DC power supply for audio or RF circuits?
Yes, but not directly. A standard buck converter will inject switching noise (typically 10mV-30mV p-p at 400kHz to 2MHz) into the sensitive analog rails, causing audible hum or RF spurious emissions. The standard engineering practice is to use a switching regulator to efficiently drop the bulk voltage (e.g., 24V to 6V), followed by a low-dropout linear regulator (LDO) with high Power Supply Rejection Ratio (PSRR) to drop 6V to 5V. The LDO acts as an active filter, attenuating the switching ripple by 40dB to 60dB.
Why does my DC-DC converter overheat or lose regulation at light loads?
If your converter loses regulation at light loads (under 10mA), it is likely entering a low-power sleep mode and failing to wake up fast enough, or it is operating in discontinuous conduction mode (DCM) where the control loop struggles to maintain tight voltage bounds. Conversely, if it overheats at light loads, check if the IC is using "forced PWM" mode. Forced PWM maintains a constant switching frequency regardless of load, which means switching losses (gate charge, core losses) remain constant even when delivering zero power. Select a regulator with "pulse-skipping" or "Eco-mode" to drop the switching frequency at light loads, drastically improving light-load efficiency.
How do I calculate the input capacitance for a 48V to 12V DC-DC power supply?
Input capacitance is critical because a buck converter draws pulsating, square-wave current from the input source. The input capacitors must supply the high-frequency RMS ripple current, otherwise the input voltage will sag and trigger undervoltage lockout (UVLO). The worst-case RMS input ripple current occurs at a 50% duty cycle ($V_{in} = 2 \times V_{out}$). The formula is $I_{Cin(RMS)} = I_{out} \times \sqrt{D \times (1-D)}$. For a 12V/5A output at 24V input (D=0.5), the input caps must handle $5A \times 0.5 = 2.5A$ RMS. Use multiple low-ESR ceramic capacitors (e.g., 4 × 10µF X7R) rated for at least 1.5× the maximum input voltage, placed within 5mm of the $V_{in}$ and PGND pins.
What is the difference between isolated and non-isolated DC-DC topologies?
Non-isolated topologies (Buck, Boost, Buck-Boost) share a common ground between the input and output. They are cheaper, smaller, and more efficient, making them ideal for 90% of embedded system designs. Isolated topologies (Flyback, Forward, LLC Resonant) use a transformer to provide galvanic isolation between input and output. You must use an isolated DC-DC power supply when safety standards require it (e.g., medical devices, AC-to-DC offline supplies), when breaking ground loops in industrial sensor networks, or when generating negative voltage rails from a positive source.
