For a standard buck DC-DC converter switching at 500 kHz to step a 12V input down to a 5V output, the switching period is exactly 2 µs and the ideal duty cycle is 41.67%. The formulas driving this are T = 1 / f (where T = 1 / 500,000 Hz) for the timing period, and D = V_out / V_in (where D = 5V / 12V) for the duty cycle in Continuous Conduction Mode (CCM). If you are probing a TPS5430, LM2596, or MP2315 module on your bench, these are the baseline numbers your oscilloscope should reflect before accounting for parasitic losses.
The Core Assumptions Fixing These Numbers
The D = V_out / V_in conversion is not a universal law; it is a simplified steady-state model. Two strict assumptions fix this answer:
- Continuous Conduction Mode (CCM): The inductor current must never fall to zero during the switching cycle. If the load drops and the converter enters Discontinuous Conduction Mode (DCM), the duty cycle must increase to maintain the output voltage, rendering the simple ratio inaccurate.
- Ideal Components (100% Efficiency): The formula assumes zero voltage drop across the MOSFET (
R_DS(on) = 0), zero forward voltage on the catch diode (V_f = 0), and zero DC resistance (DCR) in the inductor.
If you do not know the converter's topology (buck, boost, buck-boost, or flyback) or if the inductor is saturated, the
V_out / V_in ratio is useless. Furthermore, in a boost converter, the duty cycle formula flips to D = 1 - (V_in / V_out). Applying the buck formula to a boost topology will yield completely wrong PWM timing expectations.
Frequency to Period & Duty Cycle Reference Table (±20% Range)
Switching frequencies on modern DC-DC ICs are rarely exact due to internal oscillator tolerances (often ±10% to ±20%) and external timing resistor drift. Below is a reference matrix centered on 500 kHz, expanding ±20% to cover the real-world spread you will measure on a scope.
| Switching Freq (kHz) | Period (µs) | Duty Cycle (12V to 5V) | Duty Cycle (24V to 5V) | Duty Cycle (48V to 12V) |
|---|---|---|---|---|
| 400 (-20%) | 2.50 | 41.67% | 20.83% | 25.00% |
| 450 (-10%) | 2.22 | 41.67% | 20.83% | 25.00% |
| 500 (Nominal) | 2.00 | 41.67% | 20.83% | 25.00% |
| 550 (+10%) | 1.81 | 41.67% | 20.83% | 25.00% |
| 600 (+20%) | 1.66 | 41.67% | 20.83% | 25.00% |
Note: The ideal duty cycle percentage is independent of the switching frequency. Frequency dictates the period (and thus the physical size of the required inductor and capacitors), while the voltage ratio dictates the PWM on-time percentage. For deeper component sizing, refer to All About Circuits' buck converter guide or Texas Instruments SLVA301B for power stage calculations.
How Input Voltage Shifts the Switching Duty Cycle
In AC mains power, engineers calculate current and breaker shifts between 120V, 230V, and 3-phase systems. In DC-DC converter switching, your equivalent architectural shifts are the nominal DC bus voltages: 12V (automotive/IT), 24V (industrial/solar), and 48V (PoE/telecom/mild-hybrid).
The duty cycle scales inversely with input voltage. If your 5V rail is fed from a 24V industrial PLC bus instead of a 12V battery, the duty cycle drops from 41.67% to 20.83%. This shift introduces two critical bench realities:
- Minimum On-Time Violations: At 500 kHz (2 µs period), a 20.83% duty cycle requires a
416 nson-time. If your controller IC (like an older LM2576) has a minimum on-time of 500 ns, it will skip pulses, causing severe output voltage ripple. You must either lower the switching frequency or choose a modern IC like the Analog Devices LTM4622 with a sub-100ns minimum on-time. - Parasitic Dominance: At high input voltages and low duty cycles, the diode forward voltage (
V_f) and MOSFETR_DS(on)consume a larger percentage of the total switching window. The actual measured duty cycle for a 48V-to-12V conversion will often read closer to 26.5% on a scope rather than the ideal 25%, to compensate for these parasitic drops.
DC-DC Converter Switching FAQs
How does switching frequency affect DC-DC converter efficiency?
Higher switching frequencies (e.g., moving from 500 kHz to 2 MHz) allow you to use physically smaller inductors and ceramic capacitors, which is critical for dense PCB layouts. However, efficiency drops because switching losses (gate charge dissipation and MOSFET transition overlap) scale linearly with frequency. If your thermal budget is tight, dropping the frequency to 300 kHz will reduce switching losses but force you to use a larger, more expensive shielded inductor to avoid saturation at the higher peak currents.
Why is my measured duty cycle higher than the calculated Vout/Vin ratio?
The D = V_out / V_in formula assumes a lossless system. In reality, the converter must supply extra energy to overcome the voltage drop across the inductor's DCR, the PCB trace resistance, and the catch diode's forward voltage (typically 0.4V to 0.7V for a Schottky diode). The controller's feedback loop automatically widens the PWM pulse (increasing the duty cycle by 1% to 4%) to maintain the exact output voltage at the load. If you measure a 45% duty cycle on a 12V-to-5V buck, your inductor or diode is likely running hot and wasting power.
When does the Vout/Vin duty cycle conversion become meaningless?
The conversion breaks down entirely in three scenarios:
1) Discontinuous Conduction Mode (DCM): At light loads, the inductor fully depletes its energy before the cycle ends. The controller enters pulse-skipping or burst mode, making the concept of a continuous duty cycle irrelevant.
2) Current Limit / Foldback: If the output is shorted or overloaded, the controller abandons voltage regulation and switches to constant-current mode, clamping the duty cycle to a maximum safe limit (often 85-95%).
3) Dropout: If V_in sags below V_out plus the dropout voltage (e.g., a 12V battery sagging to 4.8V on a 5V rail), the converter will command 100% duty cycle and still fail to regulate.
