To measure AC mains current safely with a 3.3V microcontroller, use a current sensing transformer (CT) in a burden-and-bias topology. The default, proven configuration for up to 100A is the YHDC SCT-013-000 (100A:50mA ratio) paired with an 18Ω burden resistor and a 10kΩ/10kΩ voltage divider to bias the signal to 1.65V. This specific 18Ω value—not the commonly cited 33Ω—keeps the voltage swing strictly within the linear region of the ESP32's notoriously non-linear ADC, avoiding the 0V and 3.3V deadzones while providing galvanic isolation and zero insertion loss.
Why a Current Sensing Transformer Topology Over Shunts and Hall-Effect?
When designing an AC energy monitor, you have three primary transducer choices. While shunt resistors and Hall-effect ICs are popular for DC or low-voltage PCB applications, the current sensing transformer dominates mains AC monitoring for specific physical and electrical reasons.
| Criteria | Current Sensing Transformer (CT) | Hall-Effect IC (e.g., ACS712) | Shunt Resistor + Amp (e.g., INA219) |
|---|---|---|---|
| Galvanic Isolation | Excellent (Magnetic coupling) | Moderate (Internal isolation, but PCB creepage limits) | None (Common ground required) |
| Insertion Loss | Zero (Clamps around existing wire) | Low (Internal mΩ trace) | High (Generates heat at high currents) |
| AC/DC Capability | AC Only | AC and DC | AC and DC |
| High Current (>30A) | Ideal (Up to thousands of Amps) | Poor (Thermal limits on IC pins) | Poor (Massive shunt wattage required) |
The Verdict: Choose the CT topology whenever you are measuring AC mains (120V/240V) above 20A and do not need to measure DC offset. The physical separation between the high-voltage primary conductor and your low-voltage microcontroller is a massive safety advantage that eliminates the risk of a ground fault destroying your entire development board.
The Standard CT Interface Topology (Node-by-Node Breakdown)
A raw current sensing transformer outputs a current, not a voltage. Microcontroller ADCs read voltage. Therefore, the topology must convert the secondary current to a voltage, shift it into the positive DC range, and filter noise.
- Node A (CT Hot): One lead of the CT secondary. Connects to one side of the burden resistor.
- Node B (Virtual Ground / Bias): The second lead of the CT secondary. This node is tied to a DC voltage divider (half of VCC) to center the AC waveform. Connects to the other side of the burden resistor.
- Node C (ADC Input): Tied directly to Node A. This is the signal sent to the microcontroller's GPIO/ADC pin.
The Bias Network: Two equal resistors (R1 and R2, typically 10kΩ each) form a voltage divider from 3.3V to GND, creating the 1.65V reference at Node B. A 10µF decoupling capacitor is placed in parallel with R2 to stabilize this virtual ground against high-frequency noise.
Behavior Matrix and Failure Extremes
Understanding how the circuit reacts to component changes and catastrophic failures is critical when working near mains voltage.
Behavior Table: Parameter Changes
| If this element changes... | ...this is the result on the ADC reading |
|---|---|
| Primary AC Current Increases | Secondary current increases; AC voltage swing at Node C widens symmetrically around 1.65V. |
| Burden Resistor Value Increases | Voltage swing increases (higher ADC resolution), but risks core saturation and clipping at the ADC rails. |
| Bias Resistor R2 Increases (relative to R1) | Virtual ground shifts above 1.65V; negative half-cycles of the AC wave will clip early on the ADC. |
What Breaks at the Extremes?
If the secondary circuit is opened (e.g., the burden resistor fails open, or a wire breaks) while primary current is flowing, the CT core saturates. The secondary voltage will spike to lethal levels (hundreds or thousands of volts), arcing across the break, melting the insulation, and posing a severe shock and fire hazard. Never open a CT secondary under load.
The Shorted Secondary:
If the secondary is shorted (burden resistor is 0Ω), the output voltage is 0V. The CT will simply act as a shorted inductor, running slightly warm but entirely safe. A shorted CT is the safe default state for maintenance.
Design Walkthrough: Sizing the Burden and Bias for ESP32
Let's design the exact component values for an ESP32 ADC monitoring a 100A subpanel using the YHDC SCT-013-000 (100A primary : 50mA secondary).
Step 1: Calculate Peak Secondary Current
The 50mA rating is RMS. The peak current is:
I_peak = I_rms × √2 = 0.050A × 1.414 = 0.0707A (70.7mA)
Step 2: Determine Maximum Allowable Burden Voltage
The ESP32 ADC reads 0V to 3.3V. Our bias network centers the signal at 1.65V. Therefore, the maximum peak voltage swing before clipping is 1.65V. However, the original ESP32 ADC is notoriously non-linear below 0.15V and above 3.15V. To stay in the linear sweet spot, we limit our peak swing to 1.3V.
Step 3: Calculate Burden Resistor (R_burden)
R_burden = V_peak_target / I_peak = 1.3V / 0.0707A = 18.38Ω
The nearest standard E12 resistor value is 18Ω. Using an 18Ω 1% metal film resistor yields a peak voltage of 1.27V. The ADC signal will swing cleanly between 0.38V and 2.92V, entirely avoiding the ESP32's hardware deadzones.
Step 4: Select Bias and Filter Components
Use two 10kΩ 1% resistors for the divider (drawing only 0.33mA from the 3.3V rail). Place a 10µF X7R ceramic capacitor across the bottom 10kΩ resistor to provide a low-impedance AC ground at Node B.
Breadboard Testing and Calibration Steps
Do not clamp the CT around a live mains wire until you have verified the low-voltage bias network on your breadboard. Follow this exact sequence:
- Wire the Bias Network: Connect the two 10kΩ resistors in series between the ESP32's 3.3V pin and GND. Connect the 10µF capacitor in parallel with the GND-side resistor.
- Verify Virtual Ground: Use a multimeter to measure the voltage at the junction of the two resistors (Node B). It must read exactly 1.65V (±0.05V). If it reads 0V or 3.3V, your breadboard contacts are faulty.
- Install the Burden: With the circuit unpowered, plug the 18Ω burden resistor into Node A and Node B. Connect Node A to your chosen ADC pin (e.g., GPIO 34).
- Check Idle ADC: Power the ESP32. Read the ADC pin in software. With no primary current, the raw 12-bit ADC value should hover steadily around 2048 (half of 4095).
- Apply a Known Load: Clamp the CT around the hot conductor of a known resistive load. A standard 1500W hairdryer on a 120V circuit draws roughly 12.5A. The secondary current will be 6.25mA, generating an 112mV peak swing. Verify the ADC values oscillate symmetrically around 2048.
- Calibrate in Software: Calculate the calibration constant. With an 18Ω burden, 1 ADC step (assuming 3.3V/4095 = 0.8mV) represents roughly 0.044A of primary current. Multiply the RMS of your ADC readings by this factor in your code.
Decision Tree: Picking Your Exact CT and Burden Resistor
Use this decision path to terminate your design phase with a concrete bill of materials. Do not default to 'it depends'—match your physical constraints to the row below.
| Application Constraint | If True... | Concrete Part Pick & Burden Value |
|---|---|---|
| Measuring DC or mixed AC/DC (e.g., solar battery bank) | CTs cannot measure DC. Switch topology. | Use INA226 shunt monitor + 0.1mΩ shunt. |
| Measuring AC Mains up to 100A (Subpanels, EV chargers) | Need split-core for retrofits without disconnecting wires. | YHDC SCT-013-000 + 18Ω burden (for 3.3V ADC). |
| Measuring AC Mains up to 30A (Appliance monitoring) | Need higher resolution at lower currents. | YHDC SCT-013-030 (30A:1V built-in burden) + No external burden needed, just bias network. |
| PCB-mount, permanent installation, < 20A | Split-core is too bulky; need through-hole PCB mount. | Talema AC1005 (5A:5mA) + 100Ω burden + 1.65V bias. |
For further reading on the physics of instrument transformers and core saturation limits, refer to the Current Transformer principles on Wikipedia and the practical implementation guides at OpenEnergyMonitor. Always verify your local electrical codes regarding permanent monitoring installations; split-core CTs are generally considered non-invasive, but routing secondary wires into panels requires proper conduit and derating practices.
