To convert the fraction decimal 0.625 to binary, the direct answer is 0.101. If your target value is 0.375, the exact binary fraction is 0.011. The universal formula used is repeated multiplication by 2: taking $0.625 \times 2 = 1.25$ (record the integer 1), then $0.25 \times 2 = 0.50$ (record the integer 0), and finally $0.50 \times 2 = 1.00$ (record the integer 1). Reading the recorded integer bits top-to-bottom yields the binary fraction 0.101.
The Core Algorithm and Fixing Assumptions
Converting a decimal fraction (the part to the right of the radix point) into base-2 requires the repeated multiplication method. Unlike integer conversion, which uses repeated division by 2, fractional conversion multiplies the decimal remainder by 2, extracts the integer bit (which will always be 0 or 1), and carries the new fractional remainder forward until the remainder reaches zero or your target bit-depth is met.
In AC power theory, your final calculation is fixed by assumptions like voltage, power factor (pf), and phase angle. In binary fraction conversion, the assumption that fixes the answer is bit-depth (precision). Without a defined bit-width (e.g., 8-bit, 16-bit, or 32-bit float), a conversion is mathematically incomplete. For instance, the decimal fraction 0.1 results in an infinitely repeating binary sequence (0.0001100110011...). The assumption of an 8-bit register forces truncation to 0.00011001, fundamentally altering the value.
Furthermore, in power electronics and motor control, attempting to convert a decimal fraction of apparent power into a binary PWM control word is meaningless when the power factor (pf) is unknown. Without the pf and phase angle data, the microcontroller cannot resolve the real power fraction, rendering the binary duty-cycle calculation invalid for the DSP.
Neighboring Values Reference Table (±20% Range)
When configuring ADC thresholds or setting digital potentiometer wipers, you rarely hit exact terminating fractions. Below is a reference table anchored at 0.50, showing the ±20% neighboring range (0.40 to 0.60). The binary values assume an 8-bit unsigned fixed-point format (where the radix point is implicitly at the far left, representing $2^{-1}$ to $2^{-8}$).
| Decimal Fraction | Math (Decimal × 256) | 8-Bit Binary (Fixed-Point) | Hex Equivalent |
|---|---|---|---|
| 0.40 | 102.4 (truncates to 102) | 01100110 |
0x66 |
| 0.45 | 115.2 (truncates to 115) | 01110011 |
0x73 |
| 0.50 | 128.0 (exact) | 10000000 |
0x80 |
| 0.55 | 140.8 (rounds to 141) | 10001101 |
0x8D |
| 0.60 | 153.6 (rounds to 154) | 10011010 |
0x9A |
Note: Truncation vs. rounding introduces a quantization error. In precision DC-DC converter feedback loops, always round to the nearest integer rather than truncating, to minimize steady-state voltage offset.
How the Answer Shifts: 120V vs 230V vs 3-Phase ADC Scaling
In embedded power metering, you frequently convert a decimal fraction representing a per-unit (pu) voltage into a binary register value for a DSP. How the answer shifts for 120V vs 230V vs 3-phase systems depends entirely on the hardware scaling and ADC reference voltage.
- 120V Nominal Systems: The peak voltage is ~170V. If your voltage divider scales this down to a 0.707 decimal fraction (representing the RMS ratio of the peak), and your ADC reference is 3.3V, the binary mapping targets a specific 16-bit register value calibrated for the 170V peak.
- 230V Nominal Systems: The peak voltage is ~325V. The exact same 0.707 decimal fraction now represents a much higher absolute voltage. The voltage divider ratio must change, which shifts the binary output register value to maintain the same per-unit representation in the DSP.
- 3-Phase 400V Systems: Measuring line-to-line voltage introduces a $\sqrt{3}$ multiplier. The decimal fraction representing the RMS peak shifts, and the ADC must handle a wider dynamic range. A 32-bit IEEE 754 floating-point format is typically mandatory here, as 16-bit fixed-point will overflow or lose critical resolution during the $\sqrt{3}$ multiplication step.
According to the IEEE 754 standard for floating-point arithmetic, shifting from a 16-bit fixed-point fractional representation to a 32-bit float changes how the mantissa and exponent store the decimal fraction, entirely altering the binary hex output even if the decimal input remains identical.
Frequently Asked Questions
How to convert fraction decimal to binary using repeated multiplication?
Multiply the decimal fraction by 2. The integer part of the result (either 0 or 1) becomes your next binary digit, reading from left to right (most significant to least significant). Take the remaining fractional part and multiply by 2 again. Repeat this process until the fractional remainder reaches exactly 0.0, or until you have populated the number of bits supported by your hardware register. As detailed in All About Circuits' digital electronics guide, this is the base-2 equivalent of long division.
Why does 0.1 decimal create an infinite binary fraction?
The decimal value 0.1 (one-tenth) cannot be expressed as a finite sum of inverse powers of 2 ($1/2, 1/4, 1/8, 1/16$, etc.). Just as $1/3$ results in an infinitely repeating $0.333...$ in base-10, $1/10$ results in an infinitely repeating $0.0001100110011...$ in base-2. In embedded C programming, this is why comparing a float variable directly to 0.1 using an == operator will often fail; you must use an epsilon threshold comparison instead.
How do I convert a mixed number like 5.625 to binary?
Split the number into its integer and fractional parts. Convert the integer (5) using repeated division by 2, which yields 101. Convert the fraction (0.625) using repeated multiplication by 2, which yields 0.101. Combine them at the radix point to get the final binary value: 101.101. In a 32-bit microcontroller, this would typically be stored as an IEEE 754 single-precision float or scaled up into a fixed-point integer (e.g., multiplying by 1000 to store as the integer 5625).
When is decimal-to-binary fraction conversion meaningless in embedded C?
The conversion is practically meaningless if you do not know the target architecture's bit-width and endianness. Generating a 24-bit binary fraction string for a sensor reading is useless if the receiving SPI register on the FPGA is only 16 bits wide; the data will simply be truncated or cause a buffer overflow. Furthermore, in AC power calculations, converting a decimal fraction of apparent power to a binary control word is meaningless if the power factor (pf) is unknown, as the system cannot calculate the true real-power duty cycle without the phase angle.
