Designing a Common Source Amplifier MOSFET Circuit: Biasing, Gain, and Testing

The common source (CS) amplifier is the MOSFET equivalent of the BJT common emitter configuration. It provides high input impedance, moderate-to-high voltage gain, and a 180-degree phase inversion between the gate input and drain output. If you need to amplify a high-impedance sensor signal, build an RF preamp, or just want a reliable voltage gain stage without the base-current loading effects of a bipolar transistor, the CS amplifier MOSFET topology is your default choice.

Unlike BJTs, which are current-controlled, MOSFETs are voltage-controlled devices. This means the gate draws virtually zero DC current, allowing you to use massive biasing resistors (1MΩ or higher) without loading down your signal source. However, this high gate impedance also makes the device highly susceptible to electrostatic discharge (ESD) and parasitic oscillation if the physical layout is sloppy. Below is a complete, bench-tested guide to selecting, biasing, building, and troubleshooting a CS amplifier using the ubiquitous 2N7000 N-channel MOSFET.

MOSFET Pinout and the Three Operating Regions

Before wiring anything, you must understand the physical terminals and the mathematical boundaries of the MOSFET's operating regions. For a standard TO-92 package N-channel MOSFET like the 2N7000, holding the flat face toward you with the pins pointing down, the pinout from left to right is Source (S), Gate (G), and Drain (D). The silicon substrate, or Body (B), is internally tied to the Source in discrete 3-pin packages, creating an intrinsic parasitic body diode pointing from Source to Drain.

To use the MOSFET as a linear amplifier, you must bias it firmly in the Saturation region (often called the Active region in BJT terminology, which causes endless confusion). In MOSFET physics, 'saturation' means the channel is pinched off at the drain end, and drain current is controlled entirely by the gate-to-source voltage, independent of the drain-to-source voltage.

Selecting the Right MOSFET and Biasing for Linear Gain

Choosing a MOSFET for a CS amplifier requires balancing transconductance (g_m), gate capacitance, and maximum voltage ratings. Small-signal MOSFETs are ideal for audio and low-frequency sensor amplification, while larger geometry parts are better suited for driving heavier loads or operating at higher voltages.

The Voltage Divider Bias Network

To keep the MOSFET in the saturation region, we use a voltage divider at the gate and a source resistor (R_S) for DC stability. This is known as self-bias with a voltage divider. The source resistor introduces DC negative feedback: if temperature rises and I_D tries to increase, the voltage drop across R_S increases, which lowers V_GS (since V_G is fixed), thereby throttling I_D back down.

However, R_S also reduces AC voltage gain. To recover the AC gain while maintaining DC stability, we place a bypass capacitor (C_S) in parallel with R_S. For a more predictable and stable AC gain, split the source resistor into two: an unbypassed resistor (R_S1) that sets the AC gain, and a bypassed resistor (R_S2) that sets the DC operating point.

Complete 12V Common Source Application Circuit

Below is a complete, buildable CS amplifier designed for a 12V DC bench supply. It targets a quiescent drain current (I_DQ) of 2.0 mA and an AC voltage gain of approximately -24. We are using the 2N7000.

Component Bill of Materials (BOM)

• Q1: 2N7000 N-Channel MOSFET
• R1 (Gate Top): 1.6 MΩ resistor (Sets V_G)
• R2 (Gate Bottom): 1.0 MΩ resistor (Sets V_G)
• R_D (Drain): 2.4 kΩ resistor (Sets V_D and gain)
• R_S1 (Source Unbypassed): 100 Ω resistor (Sets AC gain)
• R_S2 (Source Bypassed): 900 Ω resistor (Sets DC bias)
• C_in, C_out: 1 µF film or ceramic capacitors (AC coupling)
• C_S: 10 µF electrolytic capacitor (Source bypass, observe polarity)

Build and Verification Steps

1. Establish the Gate Voltage: With the 12V supply on and no signal applied, measure the voltage at the Gate. The divider (1.6M / 1.0M) should yield V_G = 12V * (1.0 / 2.6) ≈ 4.61V.
2. Verify Source Voltage and Current: Measure the voltage at the Source pin. It should read approximately 2.0V. This means V_GS is roughly 2.6V. The total source resistance is 1000 Ω (100 + 900). Therefore, I_D = 2.0V / 1000Ω = 2.0 mA.
3. Check Drain Headroom: Measure the Drain pin voltage. V_D = 12V - (2.0 mA * 2.4 kΩ) = 7.2V. This leaves 5.2V of headroom to the 12V rail and 5.2V of headroom to the Source voltage (2.0V), allowing for a symmetrical ~5V peak-to-peak output swing without clipping.
4. Calculate AC Gain: The transconductance (g_m) of a 2N7000 at 2 mA is typically around 100 mS (0.1 A/V). With R_S1 unbypassed at 100 Ω, the AC gain formula is A_v ≈ -R_D / (1/g_m + R_S1). A_v ≈ -2400 / (10 + 100) = -21.8. The negative sign indicates the 180° phase inversion.
5. Inject Signal: Feed a 100 mV peak-to-peak, 1 kHz sine wave into C_in. Probe the Drain with an oscilloscope. You should see a clean, inverted sine wave of roughly 2.2V peak-to-peak.

Failure Modes and Multimeter Diagnostics

MOSFETs fail differently than BJTs. The most common bench failure is gate oxide punch-through. The silicon dioxide layer separating the gate from the channel is microscopically thin. For a small-signal part like the 2N7000, the absolute maximum V_GS is ±20V. A static shock from your finger, or a transient spike from an unbuffered signal source, can easily exceed 30V, instantly melting a microscopic hole through the oxide. When this happens, the Gate shorts to the Source or Drain, and the device loses all voltage-control capability.

The second common failure is thermal destruction due to exceeding the power dissipation limit (P_D). For a TO-92 2N7000, P_D is only 400 mW at room temperature. If your bias point drifts and V_DS = 8V while I_D = 60 mA, you are dissipating 480 mW. The die will overheat, and the silicon will eventually short internally.

Testing a Suspect MOSFET with a Digital Multimeter

You can diagnose a blown or healthy MOSFET on the bench using only a standard DMM in Diode Test mode. Follow this exact sequence to avoid false readings caused by trapped gate charge.

1. Discharge the Gate: Before testing, use a piece of bare wire or your finger to short all three pins (Gate, Drain, Source) together simultaneously. This bleeds off any parasitic charge stored in the gate capacitance that might accidentally turn the channel on during testing.
2. Test the Body Diode: Set your DMM to Diode mode. Place the Red probe on the Source and the Black probe on the Drain. You should read a standard silicon diode forward voltage drop, typically between 0.500V and 0.800V.
3. Test Reverse Blocking: Swap the probes (Red on Drain, Black on Source). The meter should read 'OL' (Open Loop), indicating the body diode is reverse-biased and blocking current.
4. Check for Gate Punch-Through: Place the Red probe on the Gate and the Black probe on the Source. The meter must read 'OL'. If you read any continuity, a low resistance, or a diode drop, the gate oxide has ruptured. Throw the part in the bin.
5. Check Drain-to-Gate Short: Place the Red probe on the Gate and the Black probe on the Drain. Again, this must read 'OL'. Any reading here indicates a catastrophic internal short.

By mastering the biasing math and understanding the physical limitations of the gate oxide, the common source amplifier MOSFET becomes one of the most reliable and versatile gain stages in your analog design toolkit. Always respect the V_GS maximums, use source degeneration for thermal stability, and keep your high-impedance gate traces short to avoid turning your amplifier into an accidental radio receiver.