The Problem Statement: Common Emitter Amplifier Example
Exam Problem: Calculate the mid-band voltage gain ($A_v$), input impedance ($Z_{in}$), and output impedance ($Z_{out}$) for the voltage-divider biased NPN common emitter amplifier shown in your exam schematic. The circuit uses a 2N3904 BJT with an emitter bypass capacitor ($C_E$) that acts as a perfect short at the operating frequency.
Given Circuit Values:
$V_{CC} = 12V$
$R_1 = 47k\Omega$, $R_2 = 10k\Omega$ (Base bias network)
$R_C = 2.2k\Omega$ (Collector resistor)
$R_E = 1k\Omega$ (Emitter resistor, fully bypassed by $C_E$)
$R_L = 10k\Omega$ (Load resistor)
$R_S = 600\Omega$ (Source resistance)
Transistor Parameters (2N3904):
$\beta = 150$ (DC current gain)
$V_{BE} = 0.7V$
$V_A = 100V$ (Early voltage)
Before touching the AC equations, we must establish the DC operating point (Q-point). The small-signal AC parameters are entirely dependent on the DC collector current. We use the standard hybrid-pi small-signal model for this analysis because it accurately maps the physical transistor behavior to linear circuit elements at mid-band frequencies.
DC Bias and Small-Signal Parameter Table
Here is the data-dense breakdown of the DC bias conditions and the resulting AC small-signal parameters. This table forms the foundation for every subsequent algebra step.
| Parameter | Symbol | Formula / Derivation | Calculated Value | Unit |
|---|---|---|---|---|
| Base Voltage | $V_B$ | $V_{CC} \times [R_2 / (R_1 + R_2)]$ | 2.105 | V |
| Emitter Current | $I_E$ | $(V_B - V_{BE}) / R_E$ | 1.405 | mA |
| Collector-Emitter Voltage | $V_{CE}$ | $V_{CC} - I_C(R_C + R_E)$ | 7.504 | V |
| Dynamic Emitter Resistance | $r_e$ | $26mV / I_E$ | 18.50 | $\Omega$ |
| Input Resistance (Base) | $r_\pi$ | $\beta \times r_e$ | 2,775 | $\Omega$ |
| Transconductance | $g_m$ | $I_C / 26mV$ | 54.04 | mS |
| Output Resistance (Early) | $r_o$ | $(V_A + V_{CE}) / I_C$ | 76.5 | $k\Omega$ |
Step-by-Step Solution: DC Bias and AC Small-Signal Analysis
We will break the algebra down into four distinct phases. Skipping steps in amplifier exams is the fastest way to lose partial credit.
Step 1: Verify the DC Bias Point
First, find the Thevenin equivalent voltage at the base:
$V_B = 12V \times \left( \frac{10k\Omega}{47k\Omega + 10k\Omega} \right) = 12 \times \left( \frac{10}{57} \right) = 2.105V$
Next, find the emitter voltage and current (assuming $I_C \approx I_E$ for $\beta = 150$):
$V_E = V_B - V_{BE} = 2.105V - 0.7V = 1.405V$
$I_E = \frac{V_E}{R_E} = \frac{1.405V}{1k\Omega} = 1.405mA$
Now calculate $V_{CE}$ to ensure the transistor is in the active region and to find $r_o$ later:
$V_{CE} = V_{CC} - I_C(R_C + R_E) = 12 - 1.405mA(2.2k\Omega + 1k\Omega) = 12 - 4.496 = 7.504V$
Check: $7.504V > 0.2V$, so the 2N3904 is safely in the forward-active region.
Step 2: Calculate Voltage Gain ($A_v$)
The mid-band voltage gain from base to collector is defined as $A_v = -g_m \times R_{eq}$, where $R_{eq}$ is the total AC resistance at the collector node. Because $C_E$ is a short at mid-band, $R_E$ is bypassed and does not appear in the AC gain equation.
$R_{eq} = R_C \parallel R_L \parallel r_o$
First, combine $R_C$ and $R_L$:
$R_C \parallel R_L = \frac{2.2k \times 10k}{2.2k + 10k} = \frac{22}{12.2} = 1.8033k\Omega$
Next, include the Early effect resistance $r_o$ (refer to the 2N3904 datasheet for typical Early voltage characteristics):
$R_{eq} = 1.8033k\Omega \parallel 76.5k\Omega = \frac{1.8033 \times 76.5}{1.8033 + 76.5} = 1.7618k\Omega$
Finally, multiply by transconductance ($g_m = 0.05404 A/V$):
$A_v = -0.05404 \times 1761.8\Omega = \mathbf{-95.2 \text{ V/V}}$
Step 3: Calculate Input Impedance ($Z_{in}$)
The total input impedance looking into the amplifier includes the bias network in parallel with the transistor's base impedance:
$Z_{in} = R_1 \parallel R_2 \parallel r_\pi$
$R_1 \parallel R_2 = \frac{47k \times 10k}{47k + 10k} = 8.245k\Omega$
$Z_{in} = 8.245k\Omega \parallel 2.775k\Omega = \frac{8.245 \times 2.775}{8.245 + 2.775} = \mathbf{2.074 k\Omega}$
Step 4: Calculate Output Impedance ($Z_{out}$)
Looking back into the output terminals (with the input source zeroed), the output impedance is the collector resistor in parallel with the transistor's internal output resistance:
$Z_{out} = R_C \parallel r_o = \frac{2.2k \times 76.5k}{2.2k + 76.5k} = \mathbf{2.138 k\Omega}$
The Trap, Sanity Checks, and Independent Verification
The Trap in this Problem: The most common mistake is confusing amplifier gain ($A_v$) with system/source gain ($A_{vs}$). The problem asked for $A_v$ (base-to-collector). If it had asked for $A_{vs}$, you would need to apply the voltage divider rule at the input: $A_{vs} = A_v \times [Z_{in} / (Z_{in} + R_S)]$. Another frequent trap is ignoring $r_o$. While $r_o$ (76.5k) is much larger than $R_C$ (2.2k), omitting it yields an $R_{eq}$ of 1.803k instead of 1.762k, shifting the gain to -97.4. In rigorous university exams, omitting the Early effect when $V_A$ is explicitly provided will cost you points.
Answer Sanity Check
Does a gain of -95.2 make physical sense? A standard common emitter amplifier with a bypassed emitter typically yields voltage gains between -50 and -300. Our order of magnitude is correct. The negative sign correctly indicates the 180-degree phase inversion inherent to the common emitter topology. Furthermore, $Z_{in}$ (2.07k) is heavily loaded by $r_\pi$ (2.77k), pulling it well below the Thevenin bias resistance of 8.24k. This is expected behavior for high-$\beta$ transistors operating at moderate collector currents.
How to Verify Independently
On the bench or in the lab, you verify this using an AC sweep in LTspice. Build the schematic with the exact resistor values and a generic NPN model (set $V_A=100$, $B_f=150$). Run the directive .ac dec 100 10 10G with a 1mV AC source. Probe the collector node. At 10kHz (safely in the mid-band where coupling and bypass capacitors act as shorts and parasitic capacitances are negligible), the LTspice trace will read exactly 39.56 dB, which translates to $10^{(39.56/20)} = 95.06$ V/V, confirming our hand calculations within a fraction of a percent.
Frequently Asked Questions
Q: Why did we ignore the Miller effect and base-collector capacitance ($C_{\mu}$)?
A: The problem specifies "mid-band" analysis. At mid-band frequencies (typically 1kHz to 100kHz for discrete audio amplifiers), the coupling and bypass capacitors are effective shorts, while the internal parasitic capacitances ($C_{\pi}$ and $C_{\mu}$) are effectively open circuits. The Miller effect only degrades gain at high frequencies, which requires a separate high-frequency AC model.
Q: What happens to the gain if the emitter bypass capacitor ($C_E$) fails open?
A: If $C_E$ is removed or fails, $R_E$ is no longer bypassed and enters the AC signal path, introducing negative feedback. The gain equation changes from $A_v \approx -g_m R_{eq}$ to $A_v \approx -\frac{R_{eq}}{r_e + R_E}$. The gain would plummet from -95.2 to roughly $-1761.8 / (18.5 + 1000) = -1.73$ V/V, but the bandwidth and linearity would drastically improve.
Q: How does temperature affect this specific amplifier example?
A: The thermal voltage ($V_T$) used in the $r_e$ and $g_m$ calculations is 26mV at room temperature (approx. 300K). If the bench temperature rises to 50°C (323K), $V_T$ increases to roughly 28mV. This lowers $g_m$, slightly reducing the AC gain. More critically, $V_{BE}$ drops by about 2mV/°C, which increases $I_C$, shifting the Q-point and potentially driving the transistor toward saturation if the bias network isn't sufficiently stiff.
