A clamper is an electronic circuit that shifts the entire DC reference level of an AC signal up or down without altering its peak-to-peak voltage swing. Also known as a DC restorer, it changes the baseline offset of a waveform while preserving its original AC shape, frequency, and amplitude. If you feed a 10V peak-to-peak sine wave centered at 0V into a positive clamper, you get a 10V peak-to-peak sine wave that now swings between 0V and +10V. The AC dynamics remain identical; only the DC floor has moved.
The Core Clamper Definition: Shifting Baselines Without Clipping
When diagnosing or designing signal conditioning stages, it is critical to understand exactly what a clamper changes in a real circuit: it alters the DC offset. It does this by using a capacitor to store a charge during one half of the AC cycle and then adding (or subtracting) that stored DC voltage in series with the input signal during the other half cycle. A diode acts as a switch to control when the capacitor charges, and a resistor provides a discharge path to maintain the time constant.
People constantly confuse clampers with clipper circuits (also called limiters). A clipper chops off the peaks of a waveform to protect downstream components or shape the signal into a square wave. A clamper leaves the peaks entirely intact but moves the whole waveform up or down the Y-axis. Think of a clipper as a low doorway that bumps your head if you are too tall, while a clamper is an elevator that moves you to a higher floor without changing your physical height.
Because clampers rely on the charge-storage properties of capacitors, they are inherently frequency-dependent. If the input frequency drops too low, the capacitor will discharge through the load resistor before the next cycle arrives, causing the clamped baseline to sag or tilt. This makes the RC time constant the most critical design parameter in any clamper circuit.
Clamper Circuit Topologies and Voltage Shifts
There are four primary clamper configurations you will encounter in schematics. The table below maps out the exact component orientations and the resulting voltage shifts, assuming a standard silicon diode with a 0.7V forward voltage drop ($V_f$) and an input signal centered at 0V DC with a peak voltage of $V_p$.
| Topology | Diode Orientation | Capacitor Polarity | Ideal Output Range (0V DC In) | Real Output (0.7V Si Diode) |
|---|---|---|---|---|
| Positive Clamper | Anode to GND, Cathode to Output | + to Output, - to Input | 0V to +2Vp | -0.7V to +(2Vp - 0.7V) |
| Negative Clamper | Cathode to GND, Anode to Output | - to Output, + to Input | -2Vp to 0V | -(2Vp - 0.7V) to +0.7V |
| Biased Positive | Anode to +Vbias, Cathode to Out | + to Output, - to Input | +Vbias to +(2Vp + Vbias) | +(Vbias - 0.7V) to +(2Vp + Vbias - 0.7V) |
| Biased Negative | Cathode to -Vbias, Anode to Out | - to Output, + to Input | -(2Vp + Vbias) to -Vbias | -(2Vp + Vbias - 0.7V) to -(Vbias - 0.7V) |
As noted in Electronics Tutorials, the 'ideal' columns assume a perfect diode with 0V drop. In bench practice, you must always account for the $V_f$ of your specific diode. If you are using a Schottky diode like the BAT54, that drop shrinks to roughly 0.3V, which tightens your output baseline much closer to the true 0V rail.
Worked Numeric Example: Designing a 1kHz Positive Clamper
Let's build a positive clamper on the bench and calculate the exact node voltages. We want to shift a 1kHz AC signal so that it sits entirely above the ground plane, preparing it for a single-supply ADC that only reads 0V to 3.3V.
Input: 1kHz sine wave, 1.5V peak (3.0Vpp), 0V DC offset.
Diode: 1N4148 signal diode ($V_f \approx 0.7V$).
Capacitor: 1µF MLCC (X7R dielectric).
Load Resistor: 100kΩ to ground.
Step 1: Verify the Time Constant ($\tau$)
The golden rule for clamper circuits is that the RC time constant must be significantly larger than the period of the input signal ($\tau \gg T$) so the capacitor holds its charge during the non-conducting half-cycle.
- Signal Period ($T$) = $1 / 1000Hz = 1ms$.
- Time Constant ($\tau$) = $R \times C = 100,000\Omega \times 1\mu F = 0.1$ seconds (100ms).
Since 100ms is 100 times greater than 1ms, the capacitor will barely discharge between cycles. The baseline will remain stable with negligible tilt.
Step 2: Calculate the Negative Half-Cycle (Charging Phase)
During the negative half-cycle, the input swings to -1.5V. The diode's anode is tied to ground (0V), and its cathode is pulled negative. The diode becomes forward-biased and conducts. The capacitor charges up to the peak input voltage minus the diode's forward drop:
$V_c = V_{peak} - V_f = 1.5V - 0.7V = 0.8V$.
The capacitor now holds 0.8V, with the output side being positive relative to the input side. The output node sits at exactly -0.7V (the diode drop).
Step 3: Calculate the Positive Half-Cycle (Discharging/Shift Phase)
During the positive half-cycle, the input swings to +1.5V. The diode is now reverse-biased (cathode is higher than anode) and stops conducting. The capacitor acts like a 0.8V battery in series with the input. The output voltage is the sum of the input and the capacitor voltage:
$V_{out(max)} = V_{in(peak)} + V_c = 1.5V + 0.8V = 2.3V$.
Final Result:
The output waveform swings from -0.7V to +2.3V. The peak-to-peak voltage remains exactly 3.0V, but the entire signal has been shifted upward by 0.8V. This shifted signal is now perfectly positioned for a single-supply op-amp buffer or a microcontroller ADC, as detailed in the All About Circuits semiconductor guide.
Where You Meet Clampers in Practice
You might not see a discrete diode-capacitor clamper in every modern digital design, but the function of DC restoration is everywhere in mixed-signal and power electronics. Here is where clamper theory directly applies to real-world hardware:
1. Composite Video and Sync Tip Clamping
In analog NTSC and PAL video transmission, the signal is AC-coupled through capacitors to block ground loops. However, the receiving display needs the 'sync tips' (the pulses that tell the electron beam when to retrace) to sit at a precise DC voltage known as the 'blacker-than-black' level. Video receiver ICs use internal active clampers (often called DC restorers) to sample the sync tip and force it to a fixed DC reference, ensuring the picture brightness doesn't drift with scene changes.
2. Gate Drive Transformers (GDTs) in Power Supplies
When driving high-side MOSFETs in half-bridge or full-bridge topologies, designers often use Gate Drive Transformers to provide galvanic isolation. Because transformers cannot pass DC, the gate drive signal is purely AC. If the duty cycle isn't exactly 50%, the transformer core will saturate, or the MOSFET gate will float to an undefined voltage. A clamper circuit on the secondary side of the GDT ensures the gate signal is clamped to the source pin's baseline, guaranteeing the MOSFET turns off completely when the PWM signal is low.
3. Radar and Sonar Receiver Front-Ends
In RF and ultrasonic receivers, the incoming echo signals are incredibly small and ride on top of low-frequency thermal noise and amplifier drift. Before the signal hits a high-speed comparator to digitize the echo, a precision clamper establishes a hard DC baseline threshold. This strips away the low-frequency drift, ensuring that only the high-frequency AC echo triggers the detection logic.
When building clampers for precision analog signals, avoid high-K ceramic capacitors (like Y5V or X7R) if the signal has a large DC bias component after clamping. These dielectrics exhibit severe capacitance loss under DC bias, which will shrink your time constant and cause your clamped baseline to sag. Use C0G/NP0 ceramics or film capacitors for stable clamping.
