Ceramic cap polarity is a fundamental misconception; standard multilayer ceramic capacitors (MLCCs) and ceramic disc capacitors are entirely non-polarized components that can be installed in either direction without risk of catastrophic failure. Unlike electrolytic or tantalum capacitors, which will vent, explode, or short-circuit if reverse-biased, a ceramic capacitor’s internal dielectric structure is symmetrical. In a real circuit, flipping a standard ceramic capacitor changes absolutely nothing about its electrical operation—current flows and charge stores identically in both directions. However, hobbyists and junior engineers frequently confuse ceramic caps with polarized electrolytics, misinterpret faint manufacturing dots as polarity markers, and conflate the strict voltage limits of DC bias derating with polarity restrictions.
The Short Answer: Ceramic Capacitors Are Non-Polarized
If you are holding a standard through-hole ceramic disc capacitor or an SMD MLCC (like a 0402, 0603, or 1206 package), there is no positive or negative terminal. You can insert the leads in either direction on your breadboard, or place the SMD pad on the PCB footprint in either orientation. The dielectric material—typically a barium titanate-based ceramic for Class II caps or a paraelectric ceramic for Class I caps—does not rely on an electrochemically formed oxide layer to function, which is the mechanism that forces polarity in aluminum and tantalum capacitors.
Dielectric Types and Polarity Comparison
Understanding how ceramic capacitors compare to other common dielectrics clarifies why the polarity question arises. The table below maps out the physical and electrical realities of the most common capacitor families you will encounter on a bench or in a BOM.
| Dielectric / Type | Polarized? | Typical Range | DC Bias Derating | Primary Failure Mode |
|---|---|---|---|---|
| C0G / NP0 (Class I Ceramic) | No | 0.5pF – 100nF | None (0% drop) | Mechanical cracking |
| X7R (Class II Ceramic) | No | 100pF – 100µF | Severe (up to 80% drop) | Flex cracking / Piezoelectric noise |
| X5R (Class II Ceramic) | No | 100nF – 100µF | Severe (up to 85% drop) | Flex cracking / Thermal aging |
| Aluminum Electrolytic | Yes | 1µF – 10,000µF | Moderate | Venting / Explosion if reverse-biased |
| Tantalum (Solid MnO2/Polymer) | Yes | 100nF – 1,000µF | Low | Catastrophic thermal runaway / Fire |
Note: Class I ceramics (C0G/NP0) are highly stable and linear, while Class II (X7R/X5R) offer high volumetric efficiency but suffer from severe non-linear voltage and temperature characteristics.
The Real Voltage Trap: DC Bias Derating
Because ceramic caps don't have a polarity limit, designers often assume that as long as they stay under the rated voltage (e.g., 10V on a 10V cap), the capacitance value remains constant. This is false for Class II dielectrics (X7R, X5R, Y5V) and is the most common trap in modern power supply design. As you apply a DC voltage across a Class II MLCC, the internal dipoles in the barium titanate dielectric align and lock into place, drastically reducing the material's permittivity. This is known as DC bias derating.
Worked Numeric Example:
Let’s look at a specific, widely used component: the Murata GRM31CR61A226ME19. This is a 22µF, 10V, X5R capacitor in a 1206 package.
- At 0V DC bias: The capacitance measures exactly 22µF.
- At 5V DC bias (50% of rated voltage): The effective capacitance drops to approximately 11µF (a 50% loss).
- At 10V DC bias (100% of rated voltage): The effective capacitance collapses to roughly 3.5µF (an 84% loss).
If you are designing a 5V buck converter output filter that requires 20µF of capacitance to maintain stability and low output ripple, and you place this 22µF 10V X5R cap on the output, you are actually operating with only ~11µF. The converter may suffer from sub-harmonic oscillation or excessive ripple. The fix is not to worry about polarity, but to either select a capacitor with a much higher voltage rating (e.g., a 25V or 50V rated part of the same capacitance) or parallel multiple smaller-value caps to mitigate the bias curve. For deep-dive simulations, you can model these exact curves using Murata's MLCC Design Characteristics tool or the Texas Instruments Analog Wire blog on DC Bias.
Where You Meet This in Practice
While electrical polarity is a non-issue, the physical orientation and placement of ceramic capacitors on a PCB dictate their reliability and acoustic performance. Here is where 'orientation' actually matters.
1. Mechanical Stress and Flex Cracks
MLCCs are essentially brittle blocks of baked ceramic with metal end-terminations. They have virtually no tolerance for mechanical bending. If you place a 1206 MLCC parallel to the edge of a PCB, or near a mounting hole, the board will naturally flex during assembly, screw-tightening, or thermal cycling. This flexure concentrates stress at the capacitor's termination interface, causing a microscopic 'flex crack' that propagates through the dielectric layers. This results in a dead short or a severe drop in capacitance. According to TDK's MLCC Board Design Care Guidelines, you should always orient rectangular MLCCs perpendicular to the expected board bending axis and keep them at least 2mm away from V-score lines and board edges.
2. Acoustic Noise (The Piezoelectric Effect)
Class II dielectrics (X7R, X5R) are inherently piezoelectric. When an AC voltage (like the ripple from a switching regulator) is applied across the capacitor, the dielectric physically expands and contracts at the switching frequency. If the ripple frequency or its harmonics fall within the human hearing range (20Hz to 20kHz), the capacitor vibrates and transfers that vibration to the PCB, which acts as a sounding board. This results in an audible, high-pitched 'singing' or 'whining' noise. To mitigate this, designers orient the caps away from large, un-damped PCB spans, use smaller case sizes (a 0402 cap generates significantly less acoustic force than a 1206), or apply acoustic potting compounds over the power stage.
3. High-Voltage RF 'Doorknob' Capacitors
There is one specific edge case where a ceramic capacitor does have a marked terminal. High-voltage ceramic 'doorknob' or disc capacitors used in RF amplifiers, Tesla coils, and high-power transmitters often feature a painted dot, stripe, or distinct terminal shape. This is not a polarity marker. It indicates the outer foil or outermost ceramic layer. In RF design, this marked terminal must be connected to the ground or the low-impedance side of the circuit. Doing so uses the outer layer as an electrostatic shield, preventing the internal high-voltage electric fields from radiating EMI into the surrounding chassis or circuitry.
Frequently Asked Questions
Can I put a standard ceramic capacitor in backwards?
Yes. Standard through-hole and SMD ceramic capacitors (C0G, X7R, X5R) are completely symmetrical and non-polarized. You can install them in either direction without affecting circuit operation or risking component destruction.
Why does my through-hole ceramic capacitor have a line or dot on it?
On standard low-voltage ceramic discs, a painted dot or line is typically a manufacturer's mark, a temperature coefficient code (like a Z5U or Y5V indicator), or a capacitance tolerance marker. It does not indicate a positive or negative terminal. On high-voltage RF ceramics, it indicates the outer shield layer, which should be routed to ground.
Do 0805 and 1206 SMD MLCCs have a positive side?
No. SMD MLCCs consist of alternating layers of ceramic and metal electrodes. The two end terminations are identical. The only 'orientation' that matters for SMD MLCCs is mechanical: ensure the long axis of the capacitor is perpendicular to the direction of expected PCB flexure to prevent termination cracking.






