When selecting a capacitor for a power supply filter, an RC timing circuit, or an RF matching network, the nominal capacitance value printed on the package is only half the story. The dielectric material dictates how that capacitance behaves under temperature shifts, applied DC voltage, and high-frequency ripple. A capacitor types chart maps these dielectric materials to their standardized temperature stability, capacitance tolerance, and voltage behavior.
The direct answer for most hobbyist and commercial PCB designs: use C0G (NP0) for precision timing and RF filtering where stability is critical, and X7R for general-purpose power decoupling and bulk bypassing. Avoid Y5V and Z5U unless you are designing for low-cost, low-stress consumer toys where massive capacitance drops are acceptable.
The EIA Capacitor Types Chart (Class 1 & Class 2 Ceramics)
The standard reference for ceramic dielectrics is the EIA RS-198 standard (harmonized internationally as IEC 60384-1). This standard defines a three-character code for Class 2 and Class 3 ceramics, while Class 1 ceramics use a separate letter-number-letter system.
1. First Character (Letter): Minimum operating temperature.
2. Second Character (Number): Maximum operating temperature.
3. Third Character (Letter): Maximum allowable capacitance change (%) over that temperature range.
Below is the complete data-dense reference table for the most common surface-mount and through-hole ceramic dielectrics. Bookmark the quick-jump anchors for your most-used bench components.
| EIA Code | Class | Temp Range (°C) | Max Cap Change | Primary Application |
|---|---|---|---|---|
| C0G (NP0) | Class 1 | -55 to +125 | ±30 ppm/°C | Precision filters, oscillators, RF matching |
| X7R | Class 2 | -55 to +125 | ±15% | General decoupling, bypass, SMPS snubbers |
| X5R | Class 2 | -55 to +85 | ±15% | High-capacitance bulk decoupling (mobile/IoT) |
| Y5V | Class 3 | -30 to +85 | +22% / -82% | Low-cost consumer electronics (non-critical) |
| Z5U | Class 3 | +10 to +85 | +22% / -56% | Room-temp only bypassing (legacy designs) |
Sources: All About Circuits: Capacitor Characteristics, KEMET Ceramic Selection Guide.
Derating, DC Bias, and Column Selection
Knowing the codes is only the first step. To actually use this chart on the bench or in CAD, you must understand which column governs your specific installation and how real-world physics modifies the base table values.
Which Column Applies to Your Installation?
Your application dictates which column you must prioritize:
- For Precision Analog / RF: The Max Cap Change column is your only concern. A 100pF C0G capacitor will stay within 0.54% of its nominal value from freezing to boiling. If you use an X7R in a 555 timer RC network or an active audio crossover, the ±15% temperature drift will shift your cutoff frequency audibly or cause timing errors.
- For Power Supply Decoupling: The Temp Range and the unlisted DC Bias Derating parameters are what matter. An automotive ECU under the hood needs X7R or X8R (up to +150°C), while a battery-powered ESP32 indoor sensor can safely use X5R to save board space and BOM cost.
How DC Bias Derating Modifies the Base Value
The most dangerous trap in the capacitor types chart is that the base capacitance value assumes 0V DC bias. This is explicitly true for Class 2 (X7R, X5R) and Class 3 (Y5V) ferroelectric ceramics.
When you apply a DC voltage across a Class 2 ceramic, the dielectric domains align and stiffen, drastically reducing the material's permittivity. If you place a 10µF, 10V-rated X5R capacitor in an 0805 package across a 10V power rail, the actual capacitance under load might drop to 2.0µF or less—an 80% loss.
What This Chart Cannot Tell You (Bench Verification)
The EIA capacitor types chart is a standardized classification system, not a comprehensive datasheet. It deliberately omits parasitic behaviors that will ruin a high-speed or high-power design. Here is what the chart hides, and how you must verify it.
1. Equivalent Series Resistance (ESR) and Inductance (ESL)
The chart tells you nothing about ESR. In a switching buck converter operating at 1MHz, a low-ESR ceramic is mandatory to handle high RMS ripple current without overheating. Furthermore, the physical package size (0402 vs 0805) dictates the Equivalent Series Inductance (ESL). An 0402 capacitor will have lower ESL and provide better high-frequency decoupling than a physically larger 1206 capacitor, even if both are X7R.
2. Piezoelectric Microphonics (The "Singing" Capacitor)
Class 2 and Class 3 dielectrics (X7R, Y5V) are inherently piezoelectric. If you use a large-value X7R MLCC (Multi-Layer Ceramic Capacitor) in the output filter of an audio amplifier or a DC-DC converter switching in the audible range (1kHz - 20kHz), the capacitor will physically vibrate and act as a speaker. This is known as "capacitor squeal." The EIA chart does not flag this. To fix it, you must switch to Class 1 (C0G) ceramics, use polymer/aluminum electrolytics, or select MLCCs with specialized flexible termination (soft-termination) that dampens the acoustic coupling to the PCB.
3. Dielectric Aging
Class 2 ceramics undergo logarithmic aging. After being heated above their Curie temperature (which happens automatically when you reflow solder them), X7R capacitors lose roughly 1% to 2% of their capacitance per decade hour (1 hour, 10 hours, 100 hours, 1000 hours). The chart lists the initial tolerance, but if you are measuring a board that has been sitting on a shelf for a year, expect the X7R bulk caps to read 5% to 7% lower than their printed nominal value. C0G (Class 1) does not age.
For deep-dive parasitic modeling and exact DC bias curves for specific part numbers (like Murata GRM or TDK C-series), always pull the specific manufacturer's s-parameter files and DC bias graphs from their MLCC product databases rather than relying solely on the generic EIA classification.
