When you make a capacitor connection in series, the total capacitance drops while the overall voltage rating increases. This is the exact inverse of how resistors behave in series. The equivalent capacitance ($C_{eq}$) is calculated using the reciprocal sum formula: $1/C_{eq} = 1/C_1 + 1/C_2 + ... + 1/C_n$. While parallel connections are used to bulk up energy storage, series topologies are essential when your operating voltage exceeds the rating of individual components, or when you need a precise, non-standard low capacitance value for high-frequency filtering. However, unlike ideal textbook models, real-world series capacitors—especially electrolytics—require careful attention to leakage current and voltage balancing to prevent catastrophic failure.
The Series Topology: Node Labels and Voltage Division
To analyze a basic two-capacitor series circuit, we define three critical nodes:
- Node A (Source+): The positive terminal of the DC supply or the high-side AC signal.
- Node B (Midpoint): The junction where the positive terminal of C2 connects to the negative terminal of C1. This node is floating relative to ground and its voltage is determined by the capacitive voltage divider rule.
- Node C (Source- / GND): The negative terminal of C2, tied to the circuit ground or return path.
In a series string, the voltage across each capacitor divides inversely proportional to its capacitance. The smaller the capacitance, the larger the voltage drop across it. The voltage across a specific capacitor $C_x$ is calculated as $V_x = V_{total} \times (C_{eq} / C_x)$. This inverse relationship is a common trap for beginners who assume equal voltage division regardless of component values.
| C1 Value | C2 Value | Total $C_{eq}$ | Applied $V_{total}$ | Voltage at Node B (Midpoint) | Voltage Across C1 / C2 |
|---|---|---|---|---|---|
| 100 µF | 100 µF | 50 µF | 100V DC | 50.0V | 50V / 50V (Balanced) |
| 10 µF | 40 µF | 8 µF | 50V DC | 40.0V | 40V / 10V (Mismatched) |
| 1 µF | 1 µF | 0.5 µF | 400V DC | 200.0V | 200V / 200V |
| 470 nF | 470 nF | 235 nF | 250V AC | 125V RMS | 125V / 125V |
Why Choose Series Over Parallel?
Deciding between a capacitor connection in series versus a parallel configuration depends entirely on your bottleneck: voltage limits or capacitance requirements. According to foundational circuit theory covered by All About Circuits, parallel arrays sum capacitance but maintain the lowest voltage rating in the string. Series arrays do the opposite.
| Criteria | Series Topology | Parallel Topology |
|---|---|---|
| Total Capacitance | Decreases ($1/C_{eq} = \Sigma 1/C_n$) | Increases ($C_{eq} = \Sigma C_n$) |
| Voltage Rating | Adds up (if balanced) | Limited by the lowest-rated capacitor |
| Primary Use Case | High-voltage buses, precise low-value filtering | Bulk energy storage, ripple reduction, decoupling |
| Failure Consequence | Shorted cap shifts full voltage to remaining caps | Shorted cap fails the entire bus (dead short) |
| Component Count | Requires balancing resistors for electrolytics | Direct connection, no extra components needed |
You choose series when you are designing a snubber for a 400V DC bus but only have 250V-rated capacitors in your BOM, or when you need an exact 235 nF value for an active filter and only have 470 nF parts on hand.
Design Walkthrough: 400V DC Bus Filter with Balancing Resistors
Let us design a real-world filter for a 400V DC bus (common in motor drives and off-line SMPS). We need approximately 50 µF of bulk capacitance. We select two Nichicon UHE series 100 µF, 250V aluminum electrolytic capacitors. Wired in series, they yield 50 µF and a theoretical 500V rating.
However, Electronics Tutorials and manufacturer datasheets highlight a critical flaw in electrolytics: leakage current mismatch. No two electrolytic capacitors have identical internal leakage. If C1 leaks more current than C2, C1 acts like a higher-value resistor in parallel, causing the DC voltage at Node B to drift upward. C2 could end up with 300V across it, exceeding its 250V rating and leading to venting or explosion.
The Fix: Bleeder / Balancing Resistors
We must place high-value resistors in parallel with each capacitor to force the voltage to divide equally based on the resistors, not the unpredictable leakage currents.
- Select Resistor Value: A common rule of thumb is to draw at least 10 times the worst-case leakage current. For a 100 µF cap at 250V, leakage might be around 0.1 mA. We want our resistors to draw ~1 mA to dominate the divider network. Using Ohm's Law for half the bus voltage (200V): $R = 200V / 1mA = 200 k\Omega$. We will use standard 220 kΩ resistors.
- Calculate Power Dissipation: $P = V^2 / R$. Across each resistor: $200^2 / 220,000 = 0.18W$. While a 0.25W resistor could technically survive, standard engineering practice dictates derating by 50% for high-voltage environments to prevent thermal drift. We will specify 1W Metal Film resistors (e.g., Vishay PR01 series).
- Final Assembly: Wire C1 and C2 in series. Solder a 220 kΩ 1W resistor directly across the leads of C1, and a second 220 kΩ 1W resistor directly across C2.
Failure Modes: What Breaks at the Extremes?
Understanding how a capacitor connection in series degrades is crucial for troubleshooting and designing protective circuits. Below is a behavior matrix detailing what happens when one element in a two-capacitor series string changes state.
| Event on C1 | Effect on $C_{eq}$ | Effect on Node B Voltage | System Consequence |
|---|---|---|---|
| C1 Degrades (ESR rises, C drops by 20%) | $C_{eq}$ drops slightly | Node B voltage shifts downward; C1 takes more AC ripple voltage. | Increased heating in C1; accelerated thermal runaway if ripple current is high. |
| C1 Shorts (Dielectric puncture) | $C_{eq}$ becomes exactly C2 | Node B pulls to Source+ voltage. | Full $V_{total}$ is applied across C2. If $V_{total}$ > C2 rating, C2 will violently fail. |
| C1 Opens (Internal lead break) | $C_{eq}$ drops to 0 | Node B floats unpredictably based on parasitic leakage. | DC blocking is maintained, but AC filtering/decoupling ceases entirely. Circuit malfunctions. |
| Balancing Resistor R1 Opens | $C_{eq}$ unchanged | Node B drifts based purely on capacitor leakage mismatch. | Latent hazard. The circuit works normally until a transient overvoltage pushes the unbalanced cap past its dielectric limit. |
Step-by-Step Breadboard Verification
Before soldering your series string into a high-voltage PCB, you must verify the topology and voltage division on the bench. Never apply full bus voltage to an untested prototype. Follow this verification sequence using low-voltage test equipment.
Tools Required: LCR meter (or multimeter with capacitance mode), 12V DC bench power supply, digital multimeter (DMM), breadboard, 100 µF and 47 µF test capacitors (to intentionally create a mismatch for testing).
- Unpowered $C_{eq}$ Check: Connect the DMM or LCR meter across Node A and Node C (the outer legs of the series string). If you are using a 100 µF and a 47 µF capacitor, your meter should read approximately 31.9 µF ($1 / (1/100 + 1/47)$). If it reads open or near zero, check for a bad breadboard contact or an open internal fuse in the capacitor.
- Low-Voltage DC Bias Test: Set your bench supply to 12.00V DC. Connect the supply positive to Node A and negative to Node C. Allow the circuit to charge for 10 seconds.
- Verify Midpoint Division: Switch your DMM to DC Volts. Place the black probe on Node C (GND) and the red probe on Node B (Midpoint).
- For the 100 µF / 47 µF mismatch, the 47 µF capacitor (assuming it is C2, connected to ground) should take the larger share of the voltage.
- Calculation: $V_{C2} = 12V \times (31.9 / 47) \approx \mathbf{8.14V}$.
- The voltage across C1 (Node A to Node B) should be $\mathbf{3.86V}$. If your DMM reads these values within a 5% tolerance, your series connection is physically sound and the capacitors are charging correctly.
- Leakage Observation (Optional but recommended): Leave the 12V applied for 5 minutes. Monitor the midpoint voltage. If it drifts by more than 0.5V over time, one of your electrolytic capacitors has excessive or highly unstable leakage current and should be binned or restricted to low-stress parallel applications.
- Discharge Protocol: Turn off the power supply. Use a 1 kΩ power resistor on insulated leads to bridge Node A to Node C, then Node B to Node C, ensuring all dielectric memory is safely bled off before touching the board.
By treating the capacitor connection in series as a complex, leakage-sensitive network rather than a simple textbook formula, you ensure long-term reliability in high-voltage power electronics and precision analog filtering.
