Mastering the Charging and Discharging Equation of a Capacitor

The Core Charging and Discharging Equation of a Capacitor

The behavior of a capacitor in a DC circuit is governed by exponential curves dictated by the resistance and capacitance in the loop. Whether you are designing a 555 timer astable oscillator, sizing a reset delay for an ESP32, or calculating the dump time of a camera flash, the charging and discharging equation of a capacitor is your primary design tool.

When a DC voltage is applied to an RC series circuit, the voltage across the capacitor ($V_c$) and the current through the circuit ($I$) change over time ($t$). The fundamental equations are:

Charging Phase

Voltage: V(t) = V_s * (1 - e^(-t / RC))
Current: I(t) = (V_s / R) * e^(-t / RC)

Discharging Phase

Voltage: V(t) = V_0 * e^(-t / RC)
Current: I(t) = -(V_0 / R) * e^(-t / RC) (Magnitude is V_0 / R * e^(-t / RC))

Every symbol in these equations represents a specific physical quantity. Misidentifying them is the most common cause of simulation-vs-bench mismatches.

Symbol Definition and Standard Units

Symbol	Definition	Standard SI Unit
V(t)	Voltage across the capacitor at time t	Volts (V)
V_s	Source (supply) voltage for charging	Volts (V)
V_0	Initial voltage across the capacitor before discharging begins	Volts (V)
R	Resistance in the charging/discharging path	Ohms (Ω)
C	Capacitance	Farads (F)
t	Time elapsed since the step input (switch closure)	Seconds (s)
e	Euler's number (mathematical constant ≈ 2.71828)	Dimensionless
τ (tau)	Time constant, where τ = R × C	Seconds (s)

Rearranged Forms: Solving for Time, Resistance, and Capacitance

In practical bench work, you rarely solve for $V(t)$. Usually, you know your target voltage threshold and your time delay, and you need to find the required $R$ or $C$. Here are the algebraically rearranged forms of the charging and discharging equation of a capacitor, solved for each variable.

Charging Rearrangements

• Solve for t: t = -R * C * ln(1 - (V(t) / V_s))
• Solve for R: R = -t / (C * ln(1 - (V(t) / V_s)))
• Solve for C: C = -t / (R * ln(1 - (V(t) / V_s)))

Discharging Rearrangements

• Solve for t: t = -R * C * ln(V(t) / V_0)
• Solve for R: R = -t / (C * ln(V(t) / V_0))
• Solve for C: C = -t / (R * ln(V(t) / V_0))

Note: ln represents the natural logarithm (base e).

Boundary Conditions: When the Formula Applies (and When It Breaks)

The equations above assume an ideal circuit. According to OpenStax University Physics, these formulas hold true under specific assumptions. When you step outside these boundaries, the math breaks down.

Core Assumptions

1. Ideal Step Input: The voltage source transitions from 0V to $V_s$ instantaneously. In reality, power supply slew rates and parasitic inductance in long wires will skew the first few microseconds.
2. Constant Resistance and Capacitance: The formula assumes $R$ and $C$ do not change with voltage or temperature. Ceramic capacitors (especially Class II dielectrics like X7R and Y5V) exhibit severe DC bias effects, where capacitance can drop by 50% or more at rated voltage.
3. Zero ESR and Leakage: The formula ignores Equivalent Series Resistance (ESR) and parallel leakage resistance. For electrolytic capacitors >100µF, leakage current will prevent the capacitor from ever reaching exactly $V_s$.

Realistic Answer Magnitudes

What should your answer look like? For standard hobbyist and commercial PCB timing circuits, the time constant (τ = RC) typically falls between 1 millisecond (0.001s) and 10 seconds. Resistors usually range from 1kΩ to 1MΩ (going higher invites noise and PCB leakage errors), and capacitors range from 1nF to 1000µF. If your calculation yields a time constant of 0.0000004 seconds or 4,000 seconds for a simple delay circuit, you have likely missed a unit conversion.

Worked Example 1: Sizing an RC Delay for a Microcontroller Reset

Scenario: You are designing a power-on reset circuit for an ESP32. The EN (enable) pin must be held below 0.8V for at least 50ms while the 3.3V rail stabilizes, after which it must rise above the 2.5V logic-high threshold to boot. You are using a 3.3V source ($V_s = 3.3V$) and want to find the capacitor size if you fix the pull-up resistor at 100kΩ.

Given:

• $V_s = 3.3 \text{ V}$
• $V(t) = 2.5 \text{ V}$ (the target threshold voltage)
• $t = 50 \text{ ms} = 0.05 \text{ s}$
• $R = 100 \text{ k}\Omega = 100,000 \text{ } \Omega$

Step 1: Select the rearranged charging equation for C.

C = -t / (R * ln(1 - (V(t) / V_s)))

Step 2: Substitute values with strict SI unit tracking.

C = -0.05 / (100,000 * ln(1 - (2.5 / 3.3)))

Step 3: Solve the inner fraction and natural log.

2.5 / 3.3 = 0.7575
1 - 0.7575 = 0.2424
ln(0.2424) = -1.417

Step 4: Final calculation.

C = -0.05 / (100,000 * -1.417)
C = -0.05 / -141,700
C = 0.0000003528 F

Step 5: Convert to standard engineering units.

0.0000003528 F = 352.8 nF

Concrete Pick: Select a standard 330nF X7R ceramic capacitor. This will yield a slightly faster rise time (~47ms), which is perfectly acceptable since the 3.3V rail typically stabilizes well before 47ms. Avoid Y5V dielectrics here, as their capacitance drops drastically near 3.3V.

Worked Example 2: Calculating Discharge Time for a Camera Flash Circuit

Scenario: A xenon flash tube is triggered across a main storage capacitor. We need to know how long it takes for the capacitor to dump its energy down to a safe handling voltage. According to All About Circuits, understanding the discharge curve is critical for safety and timing in high-energy pulse circuits.

Given:

• $V_0 = 330 \text{ V}$ (initial charged voltage)
• $V(t) = 50 \text{ V}$ (target safe discharge voltage)
• $C = 1000 \text{ \mu F} = 0.001 \text{ F}$
• $R = 10 \text{ } \Omega$ (effective dynamic resistance of the flash tube and bleeder path)

Step 1: Select the rearranged discharging equation for t.

t = -R * C * ln(V(t) / V_0)

Step 2: Substitute values.

t = -(10) * (0.001) * ln(50 / 330)

Step 3: Solve the fraction and natural log.

50 / 330 = 0.1515
ln(0.1515) = -1.887

Step 4: Final calculation.

t = -0.01 * -1.887
t = 0.01887 s

Result: The capacitor discharges to 50V in 18.87 milliseconds. Note that while the voltage drops quickly, the initial current surge ($I_0 = 330V / 10\Omega = 33A$) requires a flash tube and PCB traces rated for high peak pulse currents, not just continuous DC ampacity.

Component Selection Decision Tree: Picking R and C for Timing

When designing an RC timing network from scratch, you have two degrees of freedom. Use this decision path to lock in your component values based on your target time delay.

RC Timing Component Decision Matrix

Target Time Delay	Capacitor (C) Selection	Resistor (R) Selection	Primary Failure Mode to Avoid
< 1 ms (High speed)	100pF to 10nF (C0G/NP0 Ceramic)	1kΩ to 10kΩ	Parasitic trace capacitance skewing the delay; use tight layout.
1 ms to 100 ms (Standard logic)	10nF to 1µF (X7R Ceramic)	10kΩ to 100kΩ	DC bias capacitance drop; derate X7R capacitance by 20-40%.
100 ms to 10 s (Long delays)	1µF to 100µF (Tantalum or Film)	100kΩ to 1MΩ	PCB surface leakage and capacitor leakage current stalling the charge.
> 10 s (Very long delays)	>100µF (Aluminum Electrolytic)	1MΩ to 10MΩ	Electrolytic leakage current completely preventing the capacitor from reaching the threshold voltage.

The Default Recommendation

If you are prototyping a general-purpose timing circuit, debouncing a switch, or setting a basic microcontroller delay in the 1ms to 50ms range, do not overthink the initial selection. Default to a 10kΩ ±1% metal film resistor and a 100nF X7R ceramic capacitor. This combination provides a baseline time constant (τ) of exactly 1 millisecond, uses cheap, widely available parts, avoids the severe DC bias derating seen in larger ceramics, and keeps the impedance low enough to ignore typical PCB leakage currents. Calculate your exact required multiple from this 1ms baseline, then scale the capacitor up (e.g., to 470nF for a 4.7ms delay) rather than pushing the resistor into the mega-ohm range where noise immunity degrades.