The fundamental capacitance of the capacitor formula is expressed in two ways depending on your domain: C = Q / V for circuit-level electrical behavior, and C = (ε₀ · εᵣ · A) / d for physical component construction. Capacitance (C) is measured in Farads (F), charge (Q) in Coulombs (C), voltage (V) in Volts (V), area (A) in square meters (m²), and distance (d) in meters (m). These equations bridge the gap between the physical geometry of a component and its behavior in a circuit. Below, we break down every variable, map real-world dielectric materials, and solve practical bench problems with strict unit tracking.
The Core Formulas and Symbol Definitions
To design or analyze a capacitor, you must toggle between its electrical definition (how it stores charge) and its physical definition (how it is built). The electrical formula dictates that capacitance is the ratio of stored charge to the voltage across the plates. The physical formula dictates that capacitance is a product of the plate geometry and the insulating material between them.
| Symbol | Parameter | SI Unit | Typical Bench Values |
|---|---|---|---|
| C | Capacitance | Farads (F) | 1 pF to 10,000 µF (Supercaps reach 100+ F) |
| Q | Electric Charge | Coulombs (C) | 1 nC to 100 mC |
| V | Voltage (Potential Difference) | Volts (V) | 3.3V, 5V, 12V, 50V, 400V |
| ε₀ | Vacuum Permittivity (Constant) | F/m | 8.854 × 10-12 F/m (Source: NIST CODATA) |
| εᵣ | Relative Permittivity (Dielectric Constant) | Dimensionless | 1.0 (Air) to 10,000+ (Barium Titanate) |
| A | Overlapping Plate Area | Square meters (m²) | 1 mm² to 10 m² (foil wound) |
| d | Distance Between Plates (Dielectric Thickness) | Meters (m) | 1 µm to 5 mm |
Real-World Dielectric Data and Magnitudes
A common point of confusion for hobbyists is the sheer scale of a Farad. One Farad is a massive amount of capacitance. If you were to build a 1 Farad parallel-plate capacitor using an air gap (εᵣ ≈ 1) of 1 millimeter, the required plate area would be roughly 113 square kilometers. This is why real-world capacitors rely on high-εᵣ dielectrics, microscopic distances (d), and rolled geometries to maximize surface area (A) in a tiny footprint.
The table below provides real-world data for common dielectric materials you will encounter when selecting components or designing custom PCBs.
| Dielectric Material | Relative Permittivity (εᵣ) | Dielectric Strength (kV/mm) | Typical Capacitor Type & Use Case |
|---|---|---|---|
| Vacuum / Air | 1.0006 | ~3.0 | Variable tuning caps (RF circuits, antique radios) |
| FR-4 (PCB Substrate) | 4.2 - 4.8 | ~15.0 | Parasitic PCB capacitance, DIY embedded sensors |
| Polypropylene (Film) | 2.2 | ~650.0 | Audio crossovers, high-voltage snubbers, motor run |
| Aluminum Oxide (Electrolytic) | ~10.0 | Very high (nm scale thickness) | Power supply bulk filtering (100 µF - 10,000 µF) |
| Barium Titanate (Class II Ceramic) | 1,000 - 10,000+ | ~10.0 | SMT decoupling (X7R, Y5V), high-density MLCCs |
Rearranged Forms and Unit Traps
Depending on what you are solving for, you will need to rearrange the capacitance of the capacitor formula. Below are the algebraic rearrangements for both the electrical and physical domains.
- Solve for Charge (Q): Q = C × V
- Solve for Voltage (V): V = Q / C
- Solve for Area (A): A = (C × d) / (ε₀ × εᵣ)
- Solve for Distance (d): d = (ε₀ × εᵣ × A) / C
- Solve for Dielectric Constant (εᵣ): εᵣ = (C × d) / (ε₀ × A)
Unit Mistakes That Break the Math
When plugging numbers into these rearranged forms, three specific unit traps cause 90% of calculation errors on the bench:
- The Area Squared Trap: Converting mm² to m². A 10 mm × 10 mm plate is 100 mm². To convert to m², you must multiply by 10-6, NOT 10-3. (1 mm = 10-3 m, therefore 1 mm² = 10-6 m²).
- Ignoring ε₀: Students often multiply εᵣ directly by A/d, forgetting the vacuum permittivity constant (8.854 × 10-12). This results in an answer that is off by a factor of 100 billion.
- The Microfarad Blindspot: In C = Q / V, if your capacitor is rated at 100 µF, you must enter it as 100 × 10-6 F. Entering "100" will yield a charge value a million times too large.
Worked Examples with Unit Tracking
Let's apply the formula to two realistic scenarios: designing a parasitic capacitor on a PCB, and calculating the discharge time of a bulk power supply capacitor.
Example 1: Physical Construction (PCB Parasitic Capacitance)
Scenario: You are routing a custom PCB and accidentally create a large parallel-plate capacitor between a 5V power pour on the top layer and a ground pour on the bottom layer. The overlapping area is 20 mm × 30 mm. The FR-4 board thickness is 1.6 mm. What is the capacitance?
Step 1: Identify knowns and convert to SI base units.
- ε₀ = 8.854 × 10-12 F/m
- εᵣ = 4.5 (Typical for FR-4 at low frequencies)
- A = 20 mm × 30 mm = 600 mm². Convert to m²: 600 × 10-6 m² = 6.0 × 10-4 m²
- d = 1.6 mm. Convert to m: 1.6 × 10-3 m
Step 2: Apply the physical formula.
C = (ε₀ · εᵣ · A) / d
C = (8.854 × 10-12 F/m × 4.5 × 6.0 × 10-4 m²) / (1.6 × 10-3 m)
Step 3: Calculate numerator and denominator.
- Numerator: 8.854 × 4.5 × 6.0 = 239.058. Combine exponents: 10-12 × 10-4 = 10-16. So, 239.058 × 10-16 F·m
- Denominator: 1.6 × 10-3 m
Step 4: Divide and format.
C = 239.058 / 1.6 × 10-16 - (-3) F
C = 149.41 × 10-13 F = 1.49 × 10-11 F
Converted to picofarads (pF): 14.9 pF. This is a realistic magnitude for PCB parasitics and can easily destabilize high-speed op-amp feedback loops.
Example 2: Circuit Behavior (Bulk Capacitor Discharge)
Scenario: A 470 µF electrolytic capacitor in a 12V LED driver circuit is fully charged. If the driver IC draws a constant 50 mA during a brownout, how long will the capacitor sustain the 12V rail before dropping to 0V? (Assuming ideal linear discharge for simplicity).
Step 1: Calculate total stored charge (Q).
- C = 470 µF = 470 × 10-6 F
- V = 12 V
- Q = C × V = (470 × 10-6) × 12 = 5.64 × 10-3 Coulombs (5.64 mC)
Step 2: Relate charge to current and time.
Current (I) is the rate of charge flow: I = Q / t, therefore t = Q / I.
- I = 50 mA = 50 × 10-3 A (or C/s)
- t = (5.64 × 10-3 C) / (50 × 10-3 C/s)
- t = 0.1128 seconds (or 112.8 ms)
Bench Note: In reality, the LED driver will hit its undervoltage lockout (UVLO) threshold around 8V, not 0V, meaning your actual hold-up time is closer to 37 ms. Always design for the UVLO threshold, not absolute zero.
Assumptions, Limits, and Edge Cases
The capacitance of the capacitor formula C = (ε₀ · εᵣ · A) / d is an idealized model. When you move from textbook physics to the workbench, you must account for three major edge cases where the formula breaks down.
1. Fringing Fields
The formula assumes a perfectly uniform electric field between the plates. In reality, the electric field bows outward at the edges of the plates (fringing). For large plates and tiny gaps (like in MLCCs), fringing is negligible. For small plates and large gaps (like DIY air-core RF caps), fringing adds 5% to 15% more capacitance than the formula predicts.
2. Non-Linear Dielectrics (DC Bias Derating)
The formula assumes εᵣ is a constant. For Class I ceramics (C0G/NP0) and film capacitors, this is true. However, for Class II ceramics (X7R, Y5V), εᵣ drops drastically as the applied DC voltage increases. A 10 µF X7R capacitor might only exhibit 3 µF of actual capacitance when 10V is applied across it. As noted in industry analyses of MLCC behavior, you must consult the manufacturer's DC bias curve, not just the nominal printed value, when sizing decoupling networks.
3. Frequency Dependence
Dielectric polarization takes time. At high frequencies (RF and microwave), the dipoles in the dielectric cannot physically rotate fast enough to align with the alternating electric field. Consequently, the effective εᵣ drops, and the measured capacitance falls below the value calculated by the static formula. This is why RF engineers use specialized low-loss dielectrics and air-core geometries for resonant tank circuits.
