The Unity Gain Buffer in Op Amp Design: What It Is and Why We Need It
A voltage buffer in op amp configurations—often called a unity gain amplifier or voltage follower—is the simplest possible operational amplifier circuit. It provides a voltage gain of exactly 1 (VOUT = VIN), but its real value lies in impedance transformation. It offers near-infinite input impedance and very low output impedance, acting as an ideal bridge between a fragile, high-impedance signal source and a heavy, low-impedance load.
To build one, you only need to understand the standard 5-pin op-amp symbol (or its physical 8-pin DIP/SOIC package). Let's look at the standard dual op-amp pinout (like the ubiquitous LM358 or TL072 in an 8-pin DIP):
- Pin 1: Output A
- Pin 2: Inverting Input A (IN-)
- Pin 3: Non-Inverting Input A (IN+)
- Pin 4: V- (Negative Supply or GND)
- Pin 5: Non-Inverting Input B (IN+)
- Pin 6: Inverting Input B (IN-)
- Pin 7: Output B
- Pin 8: V+ (Positive Supply)
To configure Channel A as a buffer, you route your input signal to Pin 3 (IN+). Then, you wire Pin 1 (Output) directly back to Pin 2 (IN-). This 100% negative feedback forces the op-amp's internal differential amplifier to drive the output pin until the voltage at IN- perfectly matches the voltage at IN+. Because IN- is tied to the output, VOUT equals VIN.
Selecting and Biasing the Right Op Amp for Buffering
Choosing the right part for a buffer in op amp applications depends entirely on your signal source and power supply. If you are buffering a high-impedance piezo sensor, input bias current (IB) is your primary enemy. If you are buffering a 3.3V DAC output to drive a motor controller, rail-to-rail input/output (RRIO) and supply voltage are your main constraints.
Here are the safe default part numbers I keep in my bench drawer, complete with their critical ratings and approximate 2026 single-unit pricing:
| Part Number | Type | Supply Range | Input Bias Current | GBW | Best Use Case | Price |
|---|---|---|---|---|---|---|
| LM358 | Dual, BJT | 3V to 32V (Single/Dual) | 20 nA | 1 MHz | General purpose, non-critical DC buffering | $0.15 |
| MCP6001 | Single, CMOS | 1.8V to 6.0V | 1 pA | 1 MHz | 3.3V/5V MCU ADC buffering, battery powered | $0.25 |
| TL072 | Dual, JFET | ±5V to ±18V (Dual only) | 5 pA | 3 MHz | Audio signals, high-impedance sensor fronts | $0.40 |
| OPA333 | Single, Chopper | 1.8V to 5.5V | 20 pA | 350 kHz | Precision strain gauges, thermocouples (µV offset) | $2.60 |
Biasing for Single-Supply Operation
If you are running off a single 5V supply and need to buffer an AC signal (like audio), you cannot tie the input directly to GND-referenced signals, or the negative half of the waveform will clip. You must bias the IN+ pin to a mid-rail voltage (VCC/2). Create a voltage divider using two 10kΩ resistors from VCC to GND, bypass the midpoint with a 10µF capacitor to stabilize the virtual ground, and AC-couple your input signal through a 1µF series capacitor to the IN+ pin.
Operation Regions and the Complete Sensor Buffer Circuit
An op-amp buffer doesn't always operate in the ideal linear region. When designing your circuit, you must account for the physical limits of the silicon. Here is how a standard LM358 behaves when powered from a single 5.0V supply with GND at 0V:
| Operation Region | Input Condition | Output Voltage | Output Current Limit | Notes |
|---|---|---|---|---|
| Linear | 0.2V < VIN < 3.5V | VOUT = VIN | ±20 mA (short-circuit protected) | Ideal tracking. Phase margin is stable. |
| Positive Saturation | VIN > 3.5V | ~3.5V to 3.8V | Drops as VOUT approaches rail | LM358 cannot swing to the positive rail. Use RRIO parts for 0-5V swing. |
| Negative Saturation | VIN < 0.2V | ~5 mV to 20 mV | Sinks up to 20 mA | LM358 can swing very close to the negative rail (GND). |
Complete Application Circuit: Thermistor Buffer for an ESP32 ADC
Let's build a practical buffer to interface a 10kΩ NTC thermistor with the high-impedance, sample-and-hold capacitor inside an ESP32 GPIO ADC. The ESP32's ADC input impedance drops dynamically during sampling, which can cause reading errors if driven directly by a high-impedance voltage divider.
- Voltage Divider: Connect a 10kΩ 1% precision resistor from 3.3V to the thermistor. Connect the other side of the thermistor to GND. The midpoint is your temperature-dependent signal.
- Low-Pass Filter: Place a 100nF (0.1µF) X7R ceramic capacitor from the divider midpoint to GND to filter high-frequency noise.
- Op-Amp Power: Power an MCP6001 with 3.3V on V+ (Pin 8) and GND on V- (Pin 4). Place a 100nF bypass capacitor directly across Pins 8 and 4, as close to the plastic body as physically possible.
- Buffer Wiring: Route the filtered divider midpoint to IN+ (Pin 3). Tie OUT (Pin 1) directly to IN- (Pin 2).
- Isolation Resistor: Place a 47Ω resistor in series with the op-amp's output pin, routing the other side of the resistor to the ESP32 ADC GPIO. This prevents the capacitive load of the MCU pin and PCB trace from causing high-frequency oscillation.
Bench Scenario: Buffering a High-Impedance Piezo Sensor (And Fixing Oscillation)
Theory is clean; the bench is messy. Last month, I was tasked with buffering a 27mm piezo contact microphone. The piezo acts as a voltage source in series with a massive 1.2 MΩ source impedance and a 30nF capacitance. The goal was to buffer the signal and drive it down a 3-meter RG174 coaxial cable into a mixing desk.
The Setup: I chose a TL072 for its low 5pA input bias current (preventing DC offset across the 1.2MΩ impedance) and wired it as a unity gain buffer. I powered it with a ±12V bench supply. I tied the piezo's hot lead to IN+ via a 1MΩ pull-down resistor to provide a DC return path for the op-amp's input bias current. The output was wired directly to the coaxial cable's center conductor.
The Numbers: With the piezo sitting quietly on the bench, my oscilloscope showed the expected ~0V DC offset. But when I tapped the piezo, instead of a clean transient decay, the scope showed a massive, clipped square wave oscillating at roughly 450 kHz. The audio output was just a harsh, continuous hiss.
What Went Wrong: The 3-meter RG174 coaxial cable has a capacitance of about 100pF per meter. That's 300pF of pure capacitive load sitting directly on the op-amp's output pin. Inside the TL072, the output stage has a non-zero output impedance (roughly 30Ω at high frequencies). This 30Ω resistance interacting with the 300pF cable capacitance created a low-pass filter in the feedback path. This added severe phase lag, destroying the op-amp's phase margin and turning my negative feedback into positive feedback at 450 kHz. The buffer in op amp configurations is notoriously unstable when driving capacitive loads directly.
The Fix: I added a 56Ω isolation resistor in series with the op-amp's output pin, before the cable. Crucially, I kept the negative feedback loop (the wire from OUT to IN-) connected directly to the op-amp's Pin 1, inside the isolation resistor. The 56Ω resistor decoupled the 300pF cable capacitance from the op-amp's internal compensation network, restoring the phase margin. I also added a 10kΩ pull-down resistor at the far end of the cable to prevent static charge buildup. The oscillation vanished, and the piezo transient response was perfectly clean.
Failure Modes: How an Op Amp Buffer Dies and How to Test It
Op-amps are robust, but they do fail, usually due to overvoltage on the inputs, output short circuits exceeding the thermal shutdown limits, or Electrostatic Discharge (ESD). Here is how to diagnose a dead buffer in op amp circuits using a standard digital multimeter (DMM).
Step-by-Step Multimeter Testing (Power OFF)
Never test an op-amp with a DMM while the circuit is powered. Remove the chip from the socket or desolder it if you suspect a board-level short.
- Set your DMM to Diode Test mode.
- Check the ESD/Protection Diodes: Place the Red probe on V- (Pin 4) and the Black probe on V+ (Pin 8). You are forward-biasing the internal substrate diode. You should read a voltage drop between 0.55V and 0.75V. If it reads 'OL' (open), the internal bonding wire is snapped. If it reads 0.00V, the die is shorted.
- Check Input to Rail Shorts: Place the Red probe on IN+ (Pin 3) and Black on V+ (Pin 8). Read the diode drop. Reverse the probes. One direction should read 'OL', the other should read a diode drop (typically 0.6V). If both directions read near 0.00V, the input stage is blown from an overvoltage event.
- Check the Output Stage: Place the Red probe on V- (Pin 4) and Black on OUT (Pin 1). Note the reading. Swap probes. Then repeat between V+ (Pin 8) and OUT (Pin 1). You are checking the push-pull output transistors. If the output pin reads a dead short (0.00V) to either supply rail in both directions, the output stage has suffered thermal runaway and melted into a short circuit.
Live Bench Verification (Power ON)
If the DMM tests pass, power the circuit and verify the buffer's live behavior. Set your DMM to DC Volts. Measure the voltage at IN+ and then at the OUT pin. In a healthy buffer, these two numbers should match within the part's specified Input Offset Voltage (VOS). For an LM358, a difference of up to 3mV is normal. For an OPA333, the difference should be less than 10µV (which requires a 5.5-digit bench meter to resolve). If the output is railed at V+ or V- while the input is mid-range, the feedback trace to IN- is likely broken, and the op-amp is operating open-loop as a comparator.
For deeper study on op-amp input stage topologies and bias current errors, refer to the All About Circuits voltage follower chapter and the Texas Instruments Op-Amp Learning Center. Mastering the buffer is the mandatory first step before tackling inverting amplifiers, active filters, and PID control loops.
