Boolean Algebra Maths for Digital Logic and PLC Circuit Simplification

Boolean algebra maths is a branch of mathematics dealing with binary variables (0 and 1) and logical operations (AND, OR, NOT) used to design, analyze, and simplify digital logic circuits. In a real circuit or PLC installation, applying Boolean simplification reduces the physical component count—meaning fewer logic gates on a PCB, fewer relay coils in a control panel, or fewer rungs in a PLC ladder logic program, which directly cuts hardware costs and reduces signal propagation delay. Makers and junior engineers commonly confuse Boolean addition ($A + A = A$) with standard arithmetic addition ($A + A = 2A$), or they mix up bitwise operators (like & and | in C++) with logical operators (&& and ||) when writing microcontroller firmware.

The Core Rules of Boolean Algebra Maths in Hardware

Unlike standard algebra, which deals with continuous numbers, Boolean algebra operates strictly on two states: TRUE (1, HIGH, 5V/24V) and FALSE (0, LOW, 0V). To simplify logic circuits, you must internalize the fundamental laws. Misapplying standard algebraic rules to Boolean equations is the most common cause of failed logic designs on the bench.

For a comprehensive breakdown of these theorems, Electronics Tutorials provides an excellent reference for digital logic foundations. Below are the identities you will use 95% of the time when optimizing a circuit:

Worked Example: Simplifying a Motor Control Circuit

Let's look at a real-world scenario where boolean algebra maths saves money and improves timing. You are designing a safety interlock for a conveyor motor (Output Z). The system has three sensors: a proximity start sensor (A), a safety guard limit switch (B), and a manual override keyswitch (C).

After mapping the client's messy truth table, your raw, unsimplified Boolean equation looks like this:

$Z = (A \cdot B) + (A \cdot \overline{B} \cdot C) + (A \cdot B \cdot C)$

If you build this raw equation using standard 74HC-series logic ICs, you need:

• One SN74HC08 (Quad 2-input AND) for the $A \cdot B$ and $B \cdot C$ terms.
• One SN74HC11 (Triple 3-input AND) for the $A \cdot \overline{B} \cdot C$ term.
• One SN74HC04 (Hex Inverter) to generate $\overline{B}$.
• One SN74HC32 (Quad 2-input OR) to sum the three terms.

Total BOM: 4 ICs. At $0.15 per IC in volume, that is $0.60 in silicon, plus the PCB routing space for four 14-pin SOIC packages.

The Simplification Process

Let's apply Boolean laws to reduce this:

1. Factor out A: $Z = A \cdot [B + (\overline{B} \cdot C) + (B \cdot C)]$
2. Apply Absorption Law ($X + XY = X$): Inside the bracket, $B + (B \cdot C)$ simplifies to just $B$.
   Equation becomes: $Z = A \cdot [B + (\overline{B} \cdot C)]$
3. Apply the Redundancy Rule ($X + \overline{X}Y = X + Y$): The term $B + (\overline{B} \cdot C)$ simplifies to $B + C$.
   Final Equation: $Z = A \cdot (B + C)$

The Hardware Impact

The simplified equation $Z = A \cdot (B + C)$ requires only one AND gate and one OR gate. Because both functions are available in standard quad packages, you now only need 2 ICs total (one 74HC08, one 74HC32), cutting the silicon cost to $0.30 and freeing up 50% of the board space.

Furthermore, consider propagation delay. A standard 74HC gate at 5V has a typical propagation delay of 14 nanoseconds. The raw circuit passed signals through three sequential logic levels (Inverter $\rightarrow$ 3-input AND $\rightarrow$ OR), resulting in a worst-case delay of roughly 42ns. The simplified circuit passes through only two levels (OR $\rightarrow$ AND), dropping the delay to 28ns. In high-speed digital bus applications, that 14ns savings is the difference between a stable clock edge and a metastability failure.

Where You Meet This in Practice

You might think Boolean math is only for silicon designers, but it dictates the behavior of almost every control system you will wire or program.

PLC Ladder Logic

In a Programmable Logic Controller, Boolean algebra is visualized as ladder logic. An AND operation is represented by instructions in series (e.g., Allen-Bradley's XIC - Examine If Closed). An OR operation is represented by parallel branches. If you write redundant ladder rungs, the PLC's scan time increases. Applying Boolean absorption laws allows you to eliminate parallel branches that are logically redundant, streamlining the scan cycle.

Hardwired Relay Control Panels

Before PLCs, industrial control was done with physical electromechanical relays. The physical wiring topology perfectly mirrors Boolean maths. Relays wired in series perform an AND function (current must flow through all coils/contacts). Relays wired in parallel perform an OR function (current can flow through any path). Simplifying a Boolean equation before drafting the schematic saves physical relay sockets, wiring duct space, and heat dissipation inside the NEMA enclosure.

Microcontroller Firmware (C/C++)

When writing firmware for an ESP32 or STM32, you use Boolean logic to evaluate sensor states. However, you must distinguish between logical evaluation and bitwise manipulation. Logical operators (&&, ||) evaluate entire bytes/words as TRUE/FALSE and support short-circuit evaluation. Bitwise operators (&, |, ^) manipulate individual bits within a register, which is essential for configuring hardware peripherals via memory-mapped registers.