To convert an analog input of 2.50V using a standard 12-bit analog digital converter with a 3.3V reference, the exact digital output count is 3102. The formula used is Digital Count = (Vin / Vref) × (2^n - 1). Substituting our specific values: (2.50 / 3.30) × (2^12 - 1) = 0.7575 × 4095 = 3102. This calculation assumes a unipolar input range (0V to Vref), an ideal ADC with no quantization error offset, and a stable reference voltage.
Below is the conversion table for neighboring voltages within a ±20% range of our 2.50V baseline, assuming the same 12-bit resolution and 3.3V Vref.
| Analog Input (V) | Digital Count (12-bit) | LSB Voltage (mV) | Deviation from Baseline |
|---|---|---|---|
| 2.00V | 2481 | 0.805 mV | -20.0% |
| 2.25V | 2791 | 0.805 mV | -10.0% |
| 2.50V | 3102 | 0.805 mV | Baseline |
| 2.75V | 3412 | 0.805 mV | +10.0% |
| 3.00V | 3722 | 0.805 mV | +20.0% |
The Assumptions That Fix Your ADC Conversion
Just as power factor and phase angle fix AC power calculations, two absolute assumptions lock in your analog digital converters math: Reference Voltage (Vref) and Resolution (n-bits). If either of these drifts, your digital count no longer maps to the physical voltage you are measuring.
The Resolution dictates the total number of discrete steps the ADC can output, calculated as 2^n. A 10-bit ADC yields 1024 steps (0 to 1023), while a 16-bit ADC yields 65536 steps (0 to 65535). The Reference Voltage defines the full-scale ceiling. The weight of each step—known as the Least Significant Bit (LSB) voltage—is simply Vref / (2^n - 1).
Here is a data-dense specification table of common ADC architectures used in hobbyist and industrial designs, showing how resolution and Vref dictate real-world step sizes and component costs.
| Component / Architecture | Resolution | Vref Range | LSB Size @ 3.3V | Typical Price (2026) |
|---|---|---|---|---|
| ATmega328P Internal (Arduino Uno) | 10-bit (SAR) | AVCC (5V) or 1.1V Int. | 3.22 mV | $0.00 (Integrated) |
| Microchip MCP3008-I/P | 10-bit (SAR) | 2.7V to 5.5V | 3.22 mV | $2.15 |
| ESP32-WROOM-32 Internal | 12-bit (SAR) | 0V to 3.3V (Non-linear) | 0.805 mV | $0.00 (Integrated) |
| Texas Instruments ADS1115IDGSR | 16-bit (Sigma-Delta) | Internal PGA (±0.256V to ±6.144V) | 0.187 mV (at ±6.144V) | $3.40 |
| Analog Devices AD7606BSTZ | 16-bit (Simultaneous SAR) | 5.0V (Internal Ref) | 0.076 mV | $18.50 |
For deeper architectural differences between these chips, consult the Texas Instruments ADS1115 datasheet for Sigma-Delta behavior, or the Microchip MCP3008 datasheet for classic SAR timing requirements.
Shifting Reference Voltages: 3.3V vs 5.0V vs Internal
A single-voltage answer is never universal in ADC design. If you take the 3102 count from our opening example and feed it into a system using a 5.0V reference instead of 3.3V, the physical voltage represented by that count changes entirely.
Let us look at how the conversion shifts across three common reference voltage scenarios for a 12-bit ADC reading a raw count of 3102:
- 3.3V Vref (Standard Logic):
(3102 / 4095) × 3.3V = 2.50V. This is the standard for modern 3.3V microcontrollers like the STM32 or ESP32. - 5.0V Vref (Legacy 5V Logic):
(3102 / 4095) × 5.0V = 3.78V. If you port code from a 3.3V board to an Arduino Mega without updating your Vref multiplier, your telemetry will read 51% higher than reality. - 1.1V Internal Vref (Precision Low-Voltage):
(3102 / 4095) × 1.1V = 0.83V. Many microcontrollers feature an internal bandgap reference. This drastically shrinks the measurable ceiling but improves the LSB size to 0.268 mV, allowing you to resolve tiny sensor signals without an external op-amp.
When designing your circuit, always verify whether your ADC is using the supply rail (VDD/AVCC) as the reference or a dedicated precision voltage reference IC like the TI REF3033. Supply rails can sag under load, introducing direct errors into your digital counts.
When Analog Digital Converters Yield Meaningless Data
There are specific edge cases where the mathematical conversion from count to voltage becomes physically meaningless, regardless of how perfectly you apply the formula.
1. Source Impedance Mismatch (The Sampling Capacitor Problem)
Successive Approximation Register (SAR) ADCs, like the internal ADC on the ATmega328P or the MCP3008, use an internal sampling capacitor (typically 10pF to 14pF) that must charge to the input voltage during the acquisition time. If your signal source has a high output impedance (e.g., >10kΩ from a high-value voltage divider), the capacitor cannot charge fully before the conversion starts. The resulting digital count reflects a voltage droop, not the actual signal. The Espressif ESP32 Technical Reference Manual explicitly warns that source impedance should remain below 1kΩ for accurate 12-bit sampling.
2. The Noise Floor Swallows the LSB
Upgrading from a 10-bit to a 16-bit ADC reduces your LSB size from 3.22mV down to 0.05mV (at 3.3V). However, if your PCB layout introduces 15mV of high-frequency switching noise from a nearby buck converter, the bottom 8 bits of your 16-bit ADC will simply toggle randomly. The conversion is mathematically correct but physically meaningless because the noise amplitude exceeds the resolution. In these cases, a lower-resolution ADC paired with a hardware RC low-pass filter yields more reliable data than a high-resolution ADC with no filtering.
3. Clipping and Saturation
If your analog input exceeds Vref, the ADC saturates. A 12-bit ADC will output 4095 for any voltage between Vref and the absolute maximum pin rating (usually Vref + 0.3V). The formula will tell you the input is exactly 3.3V, even if the actual transient spike was 4.5V. Always design your front-end voltage dividers to leave a 5% to 10% headroom below Vref to capture transient overshoots.
Frequently Asked Questions
Why does my ESP32 ADC read non-linear values at the extremes?
The internal 12-bit SAR ADC on the original ESP32-WROOM-32 suffers from known non-linearity near 0V and above 3.1V. For precision DC measurements, bypass the internal ADC and use an external I2C module like the ADS1115, which guarantees monotonic linearity across its entire range.
Do I need to subtract 1 from 2^n in the formula?
Technically, yes. A 10-bit ADC has 1024 total states, numbered 0 through 1023. Therefore, full-scale Vref maps to 1023, not 1024. In high-resolution 16-bit or 24-bit ADCs, the difference between dividing by 65535 versus 65536 is negligible, but in 8-bit or 10-bit systems, using the wrong denominator introduces a measurable gain error.
How do signed (bipolar) ADCs change the math?
For bipolar ADCs measuring negative voltages (like the ADS1115 in differential mode), the output is typically represented in two's complement format. A count of 32767 represents +Vref, 0 represents 0V, and negative counts represent negative voltages. You must convert the raw two's complement hex value to a signed integer before applying the voltage scaling factor.






