The voltage resolution (Least Significant Bit, or LSB step size) of a 10-bit ADC with a 5.0V reference is exactly 4.88 mV, while a 12-bit ADC at 3.3V yields 0.805 mV per step. You calculate this using the formula LSB = V_ref / 2^n. For a standard Arduino Uno (10-bit, 5V), the math is 5.0 / 2^10 = 5.0 / 1024 = 0.00488V. For an ESP32 (12-bit, 3.3V), it is 3.3 / 2^12 = 3.3 / 4096 = 0.000805V. This raw number tells you the smallest voltage change the silicon can theoretically detect, but as we will see, real-world noise and reference stability dictate your actual usable resolution.

Quick Reference: Common ADC Resolutions (Step Size in mV)
Bit Depth (n)1.8V V_ref3.3V V_ref5.0V V_refTotal Steps
8-bit7.03 mV12.9 mV19.5 mV256
10-bit1.76 mV3.22 mV4.88 mV1,024
12-bit0.439 mV0.805 mV1.22 mV4,096
16-bit27.5 µV50.3 µV76.3 µV65,536
24-bit0.107 µV0.196 µV0.298 µV16,777,216

The Core Formula and Neighboring Reference Voltages

The fundamental assumption that fixes your ADC resolution answer is the Reference Voltage (V_ref) and the Bit Depth (n). The formula LSB = V_ref / 2^n assumes an ideal, noise-free environment. According to Analog Devices Tutorial MT-010, the theoretical resolution is only valid if your V_ref is perfectly stable. If you are using the microcontroller's internal VCC as your reference (common on basic Arduino setups), a 5% sag in your USB power supply directly injects a 5% error into every reading, rendering the last bit or two of resolution mathematically useless.

To illustrate how sensitive a 12-bit ADC is to reference voltage drift, here is a table showing the LSB step size shifting across a ±20% range around a nominal 3.3V baseline. This mimics what happens if you attempt to run a 3.3V sensor on a sagging battery or an unregulated linear regulator.

12-Bit ADC Step Size Shift (±20% V_ref Variance)
V_ref StateActual V_refLSB Step SizeImpact on 1.0V Signal Reading
-20% (Brownout)2.64V0.644 mVReads 1552 (instead of 1242)
-10% (Sag)2.97V0.725 mVReads 1379
Base (Nominal)3.30V0.805 mVReads 1242
+10% (Overvoltage)3.63V0.886 mVReads 1128
+20% (Fault)3.96V0.966 mVReads 1035

How Resolution Shifts When Scaling to Mains (120V vs 230V vs 3-Phase)

While ADC resolution is strictly a low-voltage DC concept, makers frequently use ADCs to measure AC mains voltage via potential transformers (like the ZMPT101B) or voltage dividers. In these scenarios, the DC LSB step size maps to an AC RMS granularity. How the answer shifts depends entirely on your scaling ratio.

If you are using a 12-bit ADC (3.3V reference) to monitor mains voltage, your 0.805 mV DC step size translates differently depending on the target grid:

  • 120V AC Systems (North America): You typically scale the voltage divider so that 170V peak (120V RMS) maps to the 3.3V ADC ceiling. With a 200V full-scale mapping, each 0.805 mV step represents ~0.048V AC. This is excellent granularity for detecting a 2V brownout on a household circuit.
  • 230V AC Systems (EU/UK/AU): The peak voltage is ~325V, requiring a 400V full-scale mapping to avoid clipping. Here, your 0.805 mV step now represents ~0.097V AC. You lose half your granularity, but it remains sufficient for standard energy monitoring.
  • 3-Phase Industrial (400V Line-to-Line): Measuring line-to-line requires mapping up to 600V peak. Your 12-bit step size now equates to ~0.146V AC per step. If you need to detect sub-0.1V imbalances across phases, a 12-bit internal ADC is no longer sufficient; you must step up to a 16-bit external ADC like the ADS1115.

Real-World Maker ADC Modules and the Noise Floor Limit

The theoretical conversion becomes entirely meaningless when the noise floor exceeds the LSB step size. This is measured as ENOB (Effective Number of Bits). According to Texas Instruments' Data Converter fundamentals, a 16-bit ADC on a noisy breadboard next to a switching buck converter might only yield 10 to 12 effective bits of clean data because the 2mV of EMI ripple swallows the bottom 6 bits of resolution.

Furthermore, internal microcontroller ADCs often suffer from non-linearity. As noted in the Espressif ESP32 Technical Reference, the ESP32's internal 12-bit SAR ADC is notoriously non-linear near the 0V and 3.3V rails, effectively dropping its usable resolution to 10 or 11 bits in those regions unless you apply software calibration curves.

Common Maker ADC Hardware Comparison
Module / ICAdvertised BitsReal-World ENOBInterfaceBest Use Case
ATmega328P (Uno)10-bit~8.5 to 9 bitsInternalBasic potentiometers, crude light sensing
ESP32 (Internal)12-bit~10 to 11 bitsInternalBattery voltage monitoring, basic NTC thermistors
MCP300810-bit~9.5 bitsSPIAdding multiple analog channels to Raspberry Pi
ADS111516-bit~14 to 15 bitsI2CPrecision load cells, shunt current sensing, mains monitoring
HX71124-bit~18 to 20 bitsCustom SerialStrain gauges and digital scales (includes integrated PGA)

Frequently Asked Questions

What assumption fixes the ADC resolution answer?
The calculation assumes a perfectly stable Reference Voltage (V_ref) and an ideal silicon die. In practice, you must assume a 10% to 20% loss in effective resolution (ENOB) due to thermal noise, quantization error, and PCB trace interference unless you are using a dedicated precision voltage reference IC like the LM4040.

When is calculating ADC resolution meaningless?
The math is useless if your signal source has a higher output impedance than the ADC's sample-and-hold capacitor can charge within the acquisition time. For example, feeding a 1MΩ voltage divider directly into an Arduino Uno's ADC pin will result in wild, fluctuating readings regardless of the 10-bit theoretical resolution. You must buffer high-impedance signals with an op-amp (like the LM358 or MCP6001) before they reach the ADC pin.