For a standard 12-bit ADC with a 3.3V reference, the ad converter resolution (Least Significant Bit, or LSB) is exactly 0.806 mV per digital step. The formula used to find this is $V_{LSB} = V_{REF} / 2^n$. Substituting our values: $3.3V / 2^{12} = 3.3 / 4096 = 0.0008056V$. This means every time the digital output increments by 1, the input voltage has changed by 0.806 mV. If you are measuring a 0–3.3V signal, your maximum digital count is 4095, and your absolute quantization error is ±0.403 mV.

The Core Conversion Formula & Neighboring Values

The fundamental assumption that fixes your ADC resolution is the reference voltage ($V_{REF}$) combined with the bit-depth ($n$). If your $V_{REF}$ sags by 50 mV due to a poor linear regulator, your LSB size shrinks, and your absolute voltage readings will skew proportionally. Furthermore, this formula assumes a unipolar input range (0V to $V_{REF}$). If you are using a bipolar ADC measuring ±$V_{REF}$, your total voltage span doubles, effectively halving your resolution (doubling the LSB size) for the same bit count.

Below is a spec-sheet-table of neighboring values covering a ±20% range around the ubiquitous 12-bit standard, assuming a strict 3.3V unipolar reference:

Bit-Depth ($n$) Total Steps ($2^n$) LSB Size ($V_{REF}$ = 3.3V) Max Digital Count
10-bit 1,024 3.222 mV 1,023
11-bit 2,048 1.611 mV 2,047
12-bit 4,096 0.806 mV 4,095
13-bit 8,192 0.403 mV 8,191
14-bit 16,384 0.201 mV 16,383

System Resolution Shifts: Measuring 120V, 230V, and 3-Phase Mains

An ADC chip only natively sees low-voltage DC (typically 0–3.3V or 0–5V). When you need to measure AC mains, you must use a Potential Transformer (PT) or a high-impedance resistor divider to scale the primary voltage down to the ADC's $V_{REF}$. This scaling factor drastically shifts your system-level ad converter resolution (the actual volts-per-count at the mains side).

Let's look at how the answer shifts across global mains standards using a 12-bit ADC (0.806 mV native LSB) scaled to a 1.65V peak ADC input (leaving headroom for the negative AC cycle):

  • 120V RMS (North America): Peak voltage is ~170V. A 103:1 step-down transformer scales 170V to 1.65V. Your system resolution becomes $0.806 mV \times 103 =$ 83 mV per count at the primary side.
  • 230V RMS (Europe/UK): Peak voltage is ~325V. A 197:1 step-down transformer scales 325V to 1.65V. Your system resolution drops to $0.806 mV \times 197 =$ 158 mV per count.
  • 400V 3-Phase (Industrial Line-to-Line): Peak voltage is ~565V. A 342:1 divider scales 565V to 1.65V. Your system resolution falls to $0.806 mV \times 342 =$ 275 mV per count.
Bench Tip: When measuring 3-phase systems, do not rely on the ADC's internal multiplexer to switch between phases at high speeds. The settling time of the internal sample-and-hold capacitor will introduce phase-shift errors. Use three separate ADC channels or external analog multiplexers with dedicated op-amp buffers.

When AD Converter Resolution Becomes Meaningless

Chasing a higher bit-depth is a common trap. The conversion from bits to voltage becomes entirely meaningless when your analog noise floor exceeds your LSB size. This is quantified by the Effective Number of Bits (ENOB). According to Analog Devices' Data Conversion Handbook, a 16-bit ADC might only yield 13 bits of ENOB in a real-world PCB layout due to thermal noise, clock jitter, and EMI.

If you are using a 16-bit ADC at 3.3V, your theoretical LSB is 0.05 mV. However, a standard breadboard with a switching buck converter nearby will easily inject 5 mV of high-frequency ripple onto your ground plane. That 5 mV of noise spans 100 counts on your 16-bit ADC. Your last 7 bits are just digitizing switching noise. In this scenario, a 12-bit ADC is functionally identical to the 16-bit part, but costs a fraction of the price. To make high-resolution ADCs meaningful, you must implement proper PCB grounding, use low-pass RC anti-aliasing filters, and employ linear (not switching) voltage regulators for the $V_{REF}$ pin.

Decision Tree: Picking Your ADC Bit-Depth

Use this decision-tree-table to terminate your part selection process. Match your application's required primary-side resolution to the correct architecture and concrete IC.

Application Scenario Required System Resolution Target Bit-Depth Concrete Part Pick
Basic 12V Lead-Acid Battery Monitor ~10 mV (0.1% of 12V) 10-bit to 12-bit MCP3008 (10-bit SPI) or internal ESP32 ADC (12-bit, but noisy)
AC Mains Power Metering (120V/230V) ~50 mV (requires high sample rate) 12-bit to 14-bit ADS131E08 (24-bit Sigma-Delta, but 16-bit ENOB at high speed)
Precision Load Cell / Strain Gauge < 10 µV (microvolt level) 24-bit HX711 (24-bit with integrated PGA) or ADS1232
General Purpose I2C Sensor Hub ~0.2 mV (clean DC signals) 16-bit ADS1115 (16-bit I2C, 860 SPS, internal PGA)

FAQ: Common ADC Resolution Pitfalls

Why does my 12-bit ADC only output up to 4095 instead of 4096?

A 12-bit ADC has $2^{12} = 4096$ distinct states. Because counting starts at zero (0V), the maximum digital output value is 4095, which corresponds to $V_{REF} - 1 LSB$. If your code divides by 4096 to calculate voltage, you are mathematically correct, but the maximum register value you will ever read is 4095.

Does the ADC resolution change if I use an internal vs. external reference?

The bit-depth (e.g., 12-bit) does not change, but the voltage resolution (LSB size) absolutely does. Microcontroller internal references (like the 1.1V bandgap on an ATmega328P) yield a much smaller LSB ($1.1V / 1024 = 1.07 mV$ for 10-bit) compared to using the 5V VCC rail as a reference ($5V / 1024 = 4.88 mV$). Always check the Microchip SAR ADC datasheets for specific internal reference drift specs, as temperature changes will shift your LSB size dynamically.

Can I just average multiple 10-bit samples to get 12-bit resolution?

Yes, through a technique called oversampling and decimation. According to Texas Instruments' application notes on data conversion, oversampling by a factor of 4 yields 1 additional bit of resolution. To turn a 10-bit ADC into a 12-bit ADC, you must sample 16 times ($4^2$), sum the results, and divide by 4. However, this only works if there is at least 1 LSB worth of natural Gaussian noise in the system to dither the signal; otherwise, you are just averaging the exact same quantized number repeatedly.