When you need to test an AC power supply, calibrate an inverter, or safely scale down mains voltage for an ADC, you need a predictable, frequency-independent load. That is exactly what you get in an AC resistive circuit. Unlike reactive circuits that introduce phase shifts and frequency-dependent impedance, a purely resistive AC network maintains a unity power factor (PF = 1.0) and keeps voltage and current perfectly in phase. This guide walks through the design, component selection, and failure-mode analysis of a combined series-parallel dummy load and voltage divider.
Topology Overview: The Series-Parallel AC Network
The topology we are designing combines a high-power parallel-series load bank with a high-impedance series voltage divider. This dual-network approach allows you to simultaneously draw a known AC current while providing a scaled-down, isolated AC voltage signal for measurement.
Node Definitions:
- Node A (AC Line In): The primary AC hot input terminal.
- Node B (Load Junction): The parallel connection point where the main dummy load resistors branch to ground.
- Node C (Divider Tap): The high-impedance midpoint between the upper and lower divider resistors, feeding the measurement circuit.
- Node D (AC Neutral Return): The common ground/neutral return path for both the load and the divider.
If you used an inductor or capacitor to drop voltage or limit current, the impedance would change with the AC frequency (e.g., 50Hz vs 60Hz vs 400Hz aviation power). Furthermore, reactive components introduce a phase angle, meaning your True-RMS voltage and current waveforms will not peak at the same time. By using a purely resistive topology in an AC resistive circuit, the impedance is strictly equal to the DC resistance ($Z = R$), ensuring zero phase shift, zero reactive power (VARs), and consistent behavior across any AC frequency.
Component Selection & Specification Data
Selecting the right resistors for AC mains requires looking beyond just the ohm value. You must account for peak voltage (which is $\sqrt{2}$ times the RMS voltage), thermal derating, and dielectric withstand voltage. Below is the exact bill of materials for a 120V AC, 1-Amp dummy load with a 100:1 voltage divider.
| Component Role | Part Number | Resistance | Power Rating | Tolerance | Max Working Voltage |
|---|---|---|---|---|---|
| Main Load 1 (Series) | Vishay Dale RH05060R00FE02 | 60.0 Ω | 50W (Chassis) | ±1% | 1000V AC |
| Main Load 2 (Series) | Vishay Dale RH05060R00FE02 | 60.0 Ω | 50W (Chassis) | ±1% | 1000V AC |
| Divider Upper (R1) | Yageo CFR-25JB-52-100K | 100 kΩ | 0.25W (Axial) | ±5% | 250V AC |
| Divider Lower (R2) | Yageo CFR-25JB-52-1K0 | 1.0 kΩ | 0.25W (Axial) | ±5% | 250V AC |
Note on Derating: The Vishay Dale RH050 series is rated for 50W only when mounted to a properly sized aluminum heat sink with thermal compound. In free air, they derate to roughly 15W. Our design dissipates 30W per resistor, making the heat sink mandatory.
Behavior Matrix: Failure Modes at the Extremes
Understanding what happens when a component fails is critical for safety, especially when dealing with mains AC. The table below contrasts the failure modes of our series-parallel topology. According to Electronics Tutorials, pure AC resistance failures behave identically to DC failures in terms of node voltage shifts, but the arc-flash risk is higher due to AC zero-crossing sustainment.
| Element Changed | Failure Condition | Effect on Node B (Load Current) | Effect on Node C (Divider Tap Voltage) |
|---|---|---|---|
| Load 1 (60Ω) | Open Circuit | Current drops to 0A. Total load power = 0W. | Tap voltage drops to 0V (no current flow). |
| Load 1 (60Ω) | Short Circuit | Current spikes to 2A. Breaker trips or Load 2 burns out (120W dissipated in a 50W part). | Tap voltage remains proportional to Node A, but system is likely dead due to tripped breaker. |
| Divider Upper (100kΩ) | Open Circuit | Load current completely unaffected (1A). | Node C floats to 0V or picks up ambient EMI noise. |
| Divider Lower (1kΩ) | Short Circuit | Load current completely unaffected (1A). | Node C drops to 0V. Upper resistor dissipates 0.14W (safe, no thermal failure). |
Design Walkthrough: Sizing for 120V AC Mains
Let us walk through the exact math used to select the values in the specification table above. Our design goal is to draw exactly 1.0 Ampere of RMS current from a standard 120V AC, 60Hz wall outlet, while providing a 1.2V RMS signal at Node C for an oscilloscope or microcontroller ADC.
1. Sizing the Main Load Bank (Node A to Node D)
Using Ohm's Law for AC resistive circuits ($R = V_{RMS} / I_{RMS}$):
- Total Resistance Required: $120V / 1.0A = 120\Omega$.
- Total Power Dissipated: $P = V \times I = 120V \times 1.0A = 120W$.
If we used a single 120Ω resistor, it would need to be rated for at least 150W to maintain a safe 20% thermal margin. Instead, we split the load across two 60Ω, 50W wirewound resistors in series.
Verification: $60\Omega + 60\Omega = 120\Omega$. The 120W total dissipation is split evenly, meaning each resistor dissipates 60W. Wait—60W exceeds the 50W rating!
Correction for Real-World Mains: US mains voltage is nominally 120V but often measures closer to 115V-118V at the outlet under load. At 118V, the current is $118V / 120\Omega = 0.983A$. Total power is $116W$, meaning each resistor dissipates 58W. To be strictly safe and avoid thermal runaway, we must mount these to a large extruded aluminum heat sink (like a 4-inch section of Wakefield Engineering 631-AB) using a high-quality thermal interface material (TIM) like Arctic Silver 5, which drops the chassis temperature well within the 50W continuous rating.
2. Sizing the Voltage Divider (Node A to Node D)
We need to step 120V RMS down to 1.2V RMS. This requires a division ratio of 100:1.
- Formula: $V_{out} = V_{in} \times [R2 / (R1 + R2)]$
- $1.2 = 120 \times [1000 / (100,000 + 1000)]$
- $1.2 = 120 \times [1000 / 101,000] = 1.188V$ (Close enough for ADC scaling).
The power dissipated by the divider is negligible. Total divider resistance is 101kΩ. Current is $120V / 101,000\Omega = 1.18mA$. Power dissipated by the 100kΩ upper resistor is $I^2R = (0.00118)^2 \times 100,000 = 0.14W$. A standard 0.25W (1/4W) Yageo metal-film resistor handles this easily with plenty of headroom.
Step-by-Step Breadboard & Verification Testing
Follow this sequence to validate your design safely before moving to a permanent chassis mount.
- Step Down the Source: Obtain a 12V AC halogen lighting transformer or use a Variac dialed down to exactly 12.0V AC. This provides the correct AC sine wave topology without the lethal shock risk.
- Wire the Prototype: Insert the Yageo metal-film divider resistors into the breadboard. For the main load, use standard 1/4W resistors scaled to the same ratio (e.g., two 600Ω resistors in series to draw 20mA at 12V) just to verify the node topology.
- Verify RMS Scaling: Connect a True-RMS multimeter (like the Fluke 87V) across Node A and Node D. Confirm you read 12.0V AC. Then, probe Node C (the divider tap) relative to Node D. You should read exactly 0.12V AC (120mV).
- Check Phase Alignment: Connect Channel 1 of an oscilloscope to Node A and Channel 2 to Node C. Trigger on Ch1. Because this is strictly an AC resistive circuit, the two sine waves must cross the zero-voltage axis at the exact same microsecond. Any visible phase shift indicates parasitic capacitance in your breadboard or scope probes, which is normal at high frequencies but negligible at 60Hz.
- Scale to Chassis: Once the math and topology are verified at 12V, de-energize the circuit. Transfer the high-power Vishay Dale wirewound resistors to your aluminum heat sink chassis, using ring terminals and #6-32 machine screws torqued to 1.2 Nm. Wire the divider using 22 AWG stranded hook-up wire.
- Final Mains Test: With the chassis closed and grounded, plug into a 120V GFCI-protected outlet via a Kill-A-Watt meter. Verify the Kill-A-Watt reads a Power Factor of 1.00 (or 0.99) and draws approximately 0.98 to 1.0 Amps.
By strictly adhering to resistive components and respecting thermal derating limits, you create a highly reliable, frequency-agnostic test load that will outlast reactive alternatives and provide perfectly clean, in-phase measurement data.
