Practical AC Circuit Analysis: Designing a Series RLC Bandpass Filter

When you need to isolate a specific AC frequency from a noisy signal path, a passive series RLC (Resistor-Inductor-Capacitor) bandpass filter is the most robust starting point. For a target resonance near 10 kHz, the default concrete pick is a 27 mH axial inductor, a 10 nF C0G/NP0 ceramic capacitor, and a 470 Ω carbon film resistor. This combination yields a resonant frequency ($f_r$) of 9.69 kHz with a Quality factor (Q) of 3.5, providing a predictable passband without requiring active op-amp rails or complex impedance matching.

AC circuit analysis often gets bogged down in abstract phasor diagrams. On the bench, it comes down to selecting real parts, anticipating parasitic behavior, and verifying the voltage transfer function. Here is the complete design, failure analysis, and testing protocol for a series RLC topology.

The Core Topology: Series RLC Node Map

The series RLC bandpass filter routes the AC current through all three components sequentially, but the output voltage is taken exclusively across the resistor. This configuration ensures that at resonance, where the inductive reactance ($X_L$) and capacitive reactance ($X_C$) cancel each other out, the impedance is purely resistive and maximum current flows, generating the peak $V_{out}$.

Current flows from $V_{in}$ through $L$, into Node A, through $C$, into Node B, through $R$, and finally to GND. Because $V_{out}$ is measured across $R$, the transfer function $H(j\omega)$ peaks when the imaginary parts of the impedance sum to zero.

Why Series RLC Over Parallel or Active Filters?

You might wonder why we don't just use an active Sallen-Key op-amp filter or a parallel RLC tank. The choice depends on signal purity, voltage headroom, and DC bias requirements.

We choose the Series RLC here because it requires no DC biasing (crucial for floating AC sensor signals), handles higher AC voltages without clipping, and provides a straightforward bandpass response without the high-impedance routing nightmares of a parallel tank circuit.

Design Walkthrough: Picking Real Component Values

Let's run the AC circuit analysis math to arrive at our 9.69 kHz design. The resonant frequency formula is:

$$f_r = \frac{1}{2\pi\sqrt{LC}}$$

Step 1: Pick the Capacitor. Capacitors have tighter tolerances and lower parasitics than inductors. We select a 10 nF (0.01 µF) C0G/NP0 ceramic capacitor. C0G dielectrics are mandatory for AC filtering; X7R or Y5V ceramics exhibit severe capacitance drop with applied AC voltage and introduce microphonic noise.

Step 2: Calculate the Inductor. Rearranging for $L$ with a target of 10 kHz:

$$L = \frac{1}{(2\pi \cdot 10000)^2 \cdot 10 \times 10^{-9}} \approx 25.3 \text{ mH}$$

The closest standard E12 inductor value is 27 mH. Recalculating $f_r$ with 27 mH gives us 9,689 Hz (9.69 kHz).

Step 3: Set the Q-Factor with the Resistor. The Quality factor determines the bandwidth. $Q = \frac{1}{R}\sqrt{\frac{L}{C}}$. If we want a moderate bandwidth (not too sharp, not too wide), we target $Q \approx 3.5$.

$$R = \frac{1}{Q}\sqrt{\frac{L}{C}} = \frac{1}{3.5}\sqrt{\frac{0.027}{10 \times 10^{-9}}} \approx 469.5 \text{ \Omega}$$

We select the standard 470 Ω resistor. This yields a -3dB Bandwidth ($BW = f_r / Q$) of roughly 2.77 kHz.

Behavior Matrix: What Happens When Components Shift

Components drift with temperature and age. Understanding the partial derivatives of your AC circuit analysis helps you diagnose shift on the bench. Here is how the circuit behaves when one element changes while the others remain constant.

According to fundamental AC resonance principles, the resistor has zero effect on the center frequency, making it the ideal component to swap if you need to tune the filter's sharpness without retuning the center pitch.

Failure Modes at the Extremes: Opens and Shorts

A critical part of AC circuit analysis is predicting failure modes. If a component fails open or short, how does the circuit degrade? This contrast is vital for troubleshooting.

Inductor ($L$) Failures

• Shorted $L$: The inductor becomes a wire. The circuit devolves into a simple RC high-pass filter. Low frequencies are blocked by $C$, but the sharp bandpass peak vanishes, passing all high frequencies above the RC cutoff.
• Open $L$: Current path is broken. $V_{out}$ drops to 0V across all frequencies. (Note: Inductors rarely fail open unless subjected to massive current spikes that melt the internal winding).

Capacitor ($C$) Failures

• Shorted $C$: The capacitor becomes a wire. The circuit becomes an RL low-pass filter. DC and low frequencies pass directly to $R$, while high frequencies are choked by $L$. The bandpass characteristic is destroyed.
• Open $C$: Current path is broken. $V_{out}$ drops to 0V. (Ceramic capacitors can crack and fail open under mechanical stress).

Resistor ($R$) Failures

• Shorted $R$: $V_{out}$ is clamped to 0V. The LC series path still rings, but you cannot measure the voltage drop.
• Open $R$: Current path is broken. $V_{out}$ drops to 0V.

Breadboard Testing Protocol: Step-by-Step Verification

Theory assumes ideal components; reality introduces parasitic resistance and capacitance. Follow this exact sequence to verify your design on the bench.

1. Verify Component Values: Use an LCR meter (not a standard multimeter) to measure the actual inductance and capacitance at 1 kHz. A '27 mH' inductor might actually read 25.8 mH due to core tolerances. Record the exact numbers.
2. Wire the Topology: Insert the 27 mH inductor, 10 nF capacitor, and 470 Ω resistor in series on the breadboard. Keep lead lengths under 1 cm to minimize parasitic inductance, which matters at 10 kHz.
3. Connect Instruments: Connect Channel 1 of your oscilloscope to $V_{in}$ and Channel 2 to $V_{out}$ (across the resistor). Set both probes to 1X (or 10X, but ensure the scope channel matches) and enable AC coupling on the scope to block any DC offset.
4. Sweep the Generator: Set the function generator to a 2V peak-to-peak sine wave. Start at 1 kHz and slowly sweep up to 50 kHz. Watch the amplitude of Channel 2.
5. Find the Peak: You should see $V_{out}$ peak near 9.69 kHz. At this exact frequency, the phase difference between Ch1 and Ch2 should be 0° (purely resistive). If the peak is shifted, your parasitic breadboard capacitance (typically 2-5 pF per row) or inductor tolerance is pulling the resonance. Adjust $C$ with a parallel trimmer capacitor if exact tuning is required.
6. Measure -3dB Points: Calculate 70.7% of your peak $V_{out}$ amplitude. Sweep left and right to find the frequencies where the voltage drops to this level. The difference between these two frequencies is your empirical Bandwidth.

For a deeper dive into measuring phase angles and Q-factor empirically, Electronics Tutorials provides excellent scope-read guides for resonant circuits.

Decision Tree: Selecting Your Filter Topology

Don't default to a series RLC if your application constraints don't match. Use this decision path to terminate your design phase with a concrete topology pick.

Final Recommendation: If you are analyzing a standard low-voltage, single-frequency AC signal extraction problem, build the 27 mH / 10 nF / 470 Ω Series RLC. It provides a mathematically predictable 9.69 kHz passband, requires no external power, and serves as the perfect baseline for learning practical AC impedance behavior on the bench.