To generate 100V–120V DC from a 12V square wave for low-current loads like Nixie tubes, VFD displays, or Geiger-Müller tubes, build a 5-stage half-wave Cockcroft-Walton (CW) multiplier using UF4007 ultrafast diodes and 100nF 250V X7R MLCC capacitors driven at 50kHz. This specific configuration delivers up to 5mA with acceptable ripple, avoiding the bulk and EMI headaches of a flyback transformer while sidestepping the catastrophic failure modes of using slow-recovery rectifier diodes.

The Core Decision: Half-Wave vs. Full-Wave Topology

Before laying out your voltage multiplier circuit diagram, you must choose between a half-wave and full-wave CW topology, or abandon charge pumps entirely for a magnetic solution. The half-wave CW multiplier is the default for hobbyist high-voltage, low-current builds because it requires half the diodes and grounds the load to a single reference, but it suffers from higher output ripple. Full-wave multipliers halve the ripple and double the frequency of the output pulses, but they require a floating AC drive and twice the component count.

Decision Path: Pick Your Topology
  • If your load requires > 20mA (e.g., driving motors, high-power LEDs) → Abandon multipliers. Use a Flyback Transformer or Boost Converter.
  • If your load requires 5mA–20mA and demands ultra-low ripple < 1% → Choose a Full-Wave CW Multiplier (requires a center-tapped or H-bridge AC drive).
  • If your load requires < 10mA (e.g., Nixie tubes, photomultipliers) and you want a simple single-ended ground → Pick the Half-Wave CW Multiplier (5-stage).

We are proceeding with the 5-stage half-wave CW multiplier. It hits the sweet spot for 12V-to-120V conversion, keeping component count to 10 diodes and 10 capacitors while providing enough voltage headroom to account for diode forward drops and load sag.

Anatomy of a 5-Stage Cockcroft-Walton Multiplier

The half-wave CW multiplier operates by cascading voltage doublers. Each stage consists of a clamping capacitor, a pump capacitor, and two diodes. To understand the node behavior, trace the circuit from the AC input to the DC output.

Node Labels and Signal Flow

  • AC_IN: 12V peak-to-peak, 50kHz square wave (0V to 12V).
  • GND: System ground (0V reference).
  • Node C1 (Clamp 1): Connects AC_IN to D1. Charges to V_peak (12V) on the first negative swing.
  • Node P1 (Pump 1): Junction of D1 (anode to GND, cathode to P1) and C2. Swings from 0V to 24V. D2 clamps this to the next stage.
  • Nodes C2-C5 & P2-P5: Subsequent clamping and pumping nodes. Each pumping node swings with a 12V peak-to-peak amplitude, but its DC offset shifts up by ~11.3V (12V minus the ~0.7V diode drop) per stage.
  • V_OUT (Node P5): Final DC output. Theoretically $2n \times (V_{peak} - V_f)$. For 5 stages: $10 \times (12 - 0.7) = 113V$ open-circuit.

Design Walkthrough: Sizing Real Components for 120V Output

Theoretical diagrams often gloss over parasitic effects. Here is the exact bill of materials and the engineering rationale for a robust 5mA, 110V supply.

1. The Diodes: Why UF4007 over 1N4007

A common beginner mistake is using the ubiquitous 1N4007 in a high-frequency multiplier. The 1N4007 has a reverse recovery time ($t_{rr}$) of roughly 30µs. At a 50kHz drive frequency, the period is only 20µs. The diode never fully turns off before the next cycle begins, resulting in massive reverse leakage, shoot-through currents, and catastrophic thermal failure.

The Fix: Use the UF4007 (Ultrafast, 1000V, 1A). Its $t_{rr}$ is 50ns, allowing it to switch cleanly at 50kHz. If your load is strictly under 2mA, you can use 1N4148 signal diodes (4ns $t_{rr}$), but the UF4007 provides a better safety margin against inrush currents.

2. The Capacitors: Dielectric and Voltage Rating

You need 10 capacitors. The value dictates the output impedance and ripple. The formula for CW multiplier output impedance is roughly $Z_{out} \approx \frac{n}{f \times C}$. For 5 stages at 50kHz with 100nF caps, $Z_{out} \approx 10k\Omega$. At a 5mA load, voltage drop is $5mA \times 10k\Omega = 50V$. To keep the drop lower, we must increase frequency or capacitance. Let's bump the drive frequency to 100kHz using an ESP32 PWM or an SG3525 driver, halving the impedance to 5kΩ (25V drop, yielding ~88V under load). If you need a full 110V under load, use 470nF capacitors.

Dielectric Warning: Do not use Y5V or Z5U ceramics; their capacitance plummets under DC bias and temperature changes. Use X7R or C0G/NP0. Furthermore, MLCCs suffer from DC bias derating. A 100nF 50V X7R cap might only provide 30nF when 40V is applied across it. To bypass this, specify 250V rated X7R capacitors (e.g., Murata GRM31 series). At 250V rating, a 12V or 24V DC bias causes negligible capacitance loss.

Behavior & Failure Modes: What Breaks at the Extremes?

Multipliers are highly sensitive to single-component failures because the charge must pass through every node in series. Here is how the circuit behaves when parameters shift or components fail.

Element / Condition What Changes in the Circuit Resulting Symptom
Load Current Increases (e.g., 2mA → 10mA) Voltage drop across $Z_{out}$ increases linearly; ripple voltage spikes exponentially. Output DC voltage sags severely; visible 100kHz ripple on oscilloscope.
Drive Frequency Drops (100kHz → 10kHz) Capacitive reactance ($X_c$) increases by 10x; $Z_{out}$ skyrockets. Output voltage collapses to <30V; circuit cannot sustain the load.
C1 (First Clamp Cap) Fails OPEN AC signal cannot couple into the first pump node (P1). Entire multiplier chain dies. V_OUT drops to 0V.
D3 (Middle Diode) Fails SHORT Pump node P2 and Clamp node C3 become electrically tied. Stages 3, 4, and 5 stop pumping. Output voltage caps out at ~45V (Stage 1 & 2 only).
Output Shorted to GND Massive inrush current flows through all 10 diodes and capacitors simultaneously. Diodes overheat and fail short; capacitors may vent or crack due to high $dV/dt$ stress.
Callout Tip: The Cascade Short Hazard
If a diode fails short, the AC drive can push the full peak-to-peak voltage backwards through the clamping capacitors, potentially exceeding the voltage rating of the lower-stage capacitors. Always use capacitors rated for at least $2 \times V_{peak}$ of the AC drive, even for the first stage.

Step-by-Step Breadboard Testing & Verification

Do not solder a 10-stage multiplier and apply power all at once. If there is a wiring error, debugging a 40-node ladder is a nightmare. Build and verify it stage-by-stage using an oscilloscope.

  1. Verify the AC Drive: Before connecting any diodes, probe your AC_IN source with an oscilloscope. Confirm it is a clean 12V peak-to-peak square wave at 100kHz. Ensure the rise/fall times are under 100ns to minimize switching losses.
  2. Build Stage 1 (Doubler): Install C1, D1, C2, and D2. Connect a 1MΩ bleeder resistor from V_OUT (Node P1) to GND to give the caps a discharge path.
  3. Probe Node P1: Apply power. You should see a DC offset of ~11.3V with a 12V peak-to-peak square wave riding on top of it. The DC voltage at the bleeder resistor should read ~22V. If it reads ~11V, D1 is backwards or C1 is not coupling.
  4. Build Stages 2 and 3: Add the next four components. Probe Node P3. The DC offset should now be roughly 3x the Stage 1 output (~65V DC). Safety Note: Keep one hand in your pocket when probing nodes above 50V.
  5. Complete Stages 4 and 5: Install the final components. Measure the open-circuit V_OUT. It should read between 105V and 113V DC.
  6. Apply the Load: Connect your target load (e.g., a Nixie tube with a 22kΩ anode resistor). Measure V_OUT again. If the voltage sags below the required ignition threshold (usually 85V for IN-12 tubes), you must either increase the drive frequency, increase the capacitor values to 470nF, or add a 6th stage.
  7. Measure Ripple: Switch the oscilloscope to AC coupling. Probe V_OUT. The ripple should be a 100kHz sawtooth wave. For a 5mA load on 100nF caps, expect roughly 2.5V peak-to-peak of ripple. If ripple exceeds 10V, your capacitors are likely suffering from DC bias derating (swap to 250V rated parts).

By strictly adhering to ultrafast diodes, high-voltage X7R dielectrics, and a staged verification process, this 5-stage voltage multiplier circuit diagram translates reliably from a theoretical schematic to a bench-proven, high-voltage power supply.