A SAR (Successive Approximation Register) ADC converts an analog voltage into a digital number by using a binary search algorithm, successively guessing the voltage with an internal DAC and comparing it to the input until it locks onto the exact value. If you are reading a sensor with an Arduino, ESP32, or STM32, you are almost certainly relying on a SAR ADC. Understanding how this architecture actually thinks is the difference between getting clean, repeatable sensor data and scratching your head over noisy, non-linear readings that seem to defy Ohm's law.
The Core Mechanism: How a SAR ADC Actually Thinks
Imagine a classic two-pan balance scale and a set of binary weights: 1kg, 500g, 250g, 125g, and so on. You place an unknown object on one side. To find its weight, you start with the largest weight. If it's too heavy, you remove it and try the next size down. If it's lighter than the object, you leave it on the scale and add the next weight. You repeat this until you run out of weights. That exact logic is the SAR ADC architecture in silicon.
Inside the microcontroller, the "weights" are generated by an internal Digital-to-Analog Converter (DAC), and the "balance scale" is a high-speed comparator. Let's walk through a concrete numeric example to see the math in action.
Assume a 10-bit ADC (1024 steps) with a 5.000V reference. The Least Significant Bit (LSB) represents 4.88mV (5V / 1024). We want to digitize an input voltage of 3.200V.
- Bit 9 (MSB, weight 2.5V): The DAC outputs 2.5V. The comparator sees 3.2V > 2.5V. Bit 9 is set to 1.
- Bit 8 (weight 1.25V): The DAC outputs 2.5V + 1.25V = 3.75V. The comparator sees 3.2V < 3.75V. Bit 8 is set to 0. (The 1.25V weight is removed).
- Bit 7 (weight 0.625V): The DAC outputs 2.5V + 0.625V = 3.125V. The comparator sees 3.2V > 3.125V. Bit 7 is set to 1.
- Bit 6 (weight 0.3125V): The DAC outputs 3.125V + 0.3125V = 3.4375V. The comparator sees 3.2V < 3.4375V. Bit 6 is set to 0.
This process repeats for all 10 bits. The final binary output is 1010001100, which equals 652 in decimal. Multiply 652 by our 4.88mV LSB, and you get 3.181V—remarkably close to our 3.200V target, limited only by the ADC's resolution.
Where You Meet SAR ADC Architecture in Practice
What the SAR architecture changes in a real circuit is your approach to signal conditioning. Because the SAR ADC relies on an internal sampling capacitor that must physically charge to the input voltage during a brief acquisition window, it dictates strict limits on your source impedance. You cannot just wire a high-resistance voltage divider directly to the pin and expect accuracy.
Here is where you will encounter SAR ADCs on the bench today:
- Arduino Uno/Nano (ATmega328P): Uses a 10-bit SAR ADC. It is robust but requires source impedances below 10kΩ for full 10-bit accuracy.
- ESP32 (Original and S3 variants): Features a 12-bit SAR ADC. However, it is notorious for non-linearity at the extremes of its range. With 11dB attenuation, the usable linear window is roughly 0.15V to 2.5V; anything outside this will clip or read erratically.
- External SPI Chips (e.g., MCP3008, MCP3208): When you need more channels or better isolation than the internal MCU ADC provides, these 10-bit and 12-bit SAR chips are the standard go-to for hobbyist and industrial SPI sensor arrays.
- STM32 Microcontrollers: Often feature multiple 12-bit SAR ADCs capable of interleaved sampling, allowing for simultaneous multi-phase motor current sensing.
The High-Impedance Trap: A Real-World Bench Failure
Abstract theory is fine, but SAR ADCs usually bite you when you ignore the analog front-end. Here is a classic scenario that burns hours of debugging time for embedded developers.
Setup: You are building a temperature logger with an Arduino Nano (ATmega328P). You use a voltage divider consisting of a 100kΩ pull-up resistor and a 100kΩ NTC thermistor. The midpoint is wired directly to GPIO A0. At room temperature, the thermistor is exactly 100kΩ, so the voltage at A0 should be exactly 2.500V (half of the 5V VCC).
Numbers: The theoretical Thevenin equivalent source impedance of this divider is R1 || R2, which equals 50kΩ. You expect analogRead(A0) to return 512 (exactly half of 1024).
Outcome: Your serial monitor spits out values hovering around 450. You calculate the voltage: (450 / 1024) * 5V = 2.19V. You probe the pin with your multimeter, and it reads exactly 2.50V. The multimeter and the microcontroller disagree.
What Went Wrong: The ATmega328P SAR ADC has an internal sample-and-hold capacitor of roughly 14pF. The Microchip datasheet explicitly states that to charge this capacitor to 10-bit accuracy within the 1.5 ADC clock cycle acquisition window, the source impedance must not exceed 10kΩ. Your 50kΩ source formed an RC low-pass filter with the internal switch resistance and sampling cap. The capacitor simply didn't have enough time to charge to 2.5V before the SAR logic started its binary search, resulting in an artificially low reading.
The Fix: Never drive a SAR ADC from a high-impedance node. Add a 100nF ceramic capacitor directly between the A0 pin and GND to act as a local charge reservoir, or buffer the signal with a low-output-impedance op-amp like the MCP6001.
SAR vs. Sigma-Delta vs. Flash: Clearing Up the Confusion
People commonly confuse SAR ADCs with Sigma-Delta (ΣΔ) converters because both are used in measurement equipment, but their underlying physics and ideal use cases are entirely different. Flash ADCs represent the other extreme of the spectrum.
| Feature | SAR ADC | Sigma-Delta (ΣΔ) ADC | Flash ADC |
|---|---|---|---|
| Core Mechanism | Binary search via DAC & comparator | Oversampling + digital decimation filter | Parallel bank of 2^N comparators |
| Typical Resolution | 8 to 18 bits | 16 to 32 bits | 6 to 10 bits |
| Speed (Sample Rate) | Moderate (100 kSPS to 5 MSPS) | Slow (10 SPS to 1 MSPS) | Ultra-fast (100 MSPS to 10+ GSPS) |
| Power Consumption | Low to Medium | Low (at slow speeds) | Extremely High |
| Best Application | MCU sensor reading, SPI data acquisition | Audio, precision multimeters, load cells | Oscilloscopes, software-defined radio |
If you are designing a high-fidelity audio interface or a 6.5-digit bench multimeter, you want a Sigma-Delta architecture. If you are building a digital storage oscilloscope, you need Flash. But for 95% of embedded microcontroller tasks—reading potentiometers, battery voltages, and environmental sensors—the SAR ADC is the undisputed king due to its perfect balance of speed, resolution, and silicon area.
Frequently Asked Questions
Why is my ESP32 SAR ADC reading so noisy and non-linear?
The original ESP32 (Xtensa LX6 core) uses a 12-bit SAR ADC that is heavily optimized for silicon area rather than precision. The internal attenuation switches introduce non-linearity, particularly below 0.15V and above 2.5V. Always use the analogSetAttenuation(ADC_11db) function to map your expected voltage into the 0.15V–2.5V "sweet spot," and implement a software moving-average filter to tame the inherent thermal noise.
Can I increase the sampling rate of my Arduino's SAR ADC?
>Yes. By default, the ATmega328P ADC clock prescaler is set to 128, yielding an ADC clock of 125kHz (from a 16MHz system clock) and a sample rate of roughly 9.6 kSPS. You can manually write to the ADCSRA register to lower the prescaler to 64 or 32. Lowering it to 32 gives an ADC clock of 500kHz and pushes the sample rate to nearly 40 kSPS, though you will sacrifice roughly 1 bit of effective resolution due to increased comparator noise.
Do I need an anti-aliasing filter for a SAR ADC?
>Absolutely. Because SAR ADCs sample the signal instantaneously (via the sample-and-hold switch), any high-frequency noise above the Nyquist limit (half your sampling rate) will fold back into your baseband and corrupt your data. A simple first-order RC low-pass filter (e.g., 100Ω resistor and 100nF capacitor) at the ADC input is mandatory for clean signal acquisition.
