When you ask how does an arc fault circuit interrupter work, the answer lies far beyond the simple thermal and magnetic trips found in standard breakers. Modern Combination-Type AFCIs rely on an embedded microcontroller or Digital Signal Processor (DSP) to continuously sample the AC current waveform at high frequencies (typically 100 kHz to 1 MHz). While a standard breaker only monitors RMS overcurrent, the AFCI's firmware applies digital signal processing—often Fast Fourier Transforms (FFT) or Discrete Wavelet Transforms (DWT)—to isolate the high-frequency broadband "noise" (10 kHz to 100 MHz) generated by the rapid ionization and deionization of air during an electrical arc.
To understand this from an embedded engineering perspective, we must reverse-engineer the Analog Front End (AFE) that conditions the mains current into a readable signal for a microcontroller's ADC. Below, we break down the exact sensor topology, component behaviors, and a breadboard design using an ESP32 to sniff arc signatures.
The Embedded AFE Topology: Node-by-Node Breakdown
The primary challenge in arc detection is dynamic range. A 15A branch circuit produces a massive 60 Hz fundamental current, but the high-frequency arc noise riding on top of it is measured in millivolts. If you feed this directly into a 12-bit ADC, the 60 Hz wave will saturate the input, clipping the high-frequency data. The AFE topology solves this by stripping the fundamental and amplifying the noise.
- Node A (CT Secondary): A Current Transformer (CT) clamps around the hot conductor, stepping down the primary AC current to a manageable secondary current (e.g., 50 mA at full load).
- Node B (Burden & DC Bias): A burden resistor converts the secondary current to voltage. Because microcontrollers cannot read negative voltages, a voltage divider biases this node to VCC/2 (1.65V for a 3.3V system), centering the AC waveform.
- Node C (High-Pass Filter Output): An active or passive RC high-pass filter with a cutoff around 10 kHz blocks the 60 Hz fundamental and low-order harmonics, allowing only the high-frequency arc "shoulders" to pass.
- Node D (Op-Amp / ADC In): A non-inverting operational amplifier applies high gain (e.g., 20x to 50x) to the filtered high-frequency noise, scaling it to the 0-3.3V range of the MCU's ADC.
Behavior Matrix: Component Shifts and Failure Extremes
In embedded safety circuits, component failure modes dictate whether the system fails safe (trips) or fails blind (allows a fire). Here is how the topology reacts when elements shift or break.
| Circuit Element | Normal State / Value | Extreme Failure (Open / Short) | Resulting MCU / System Behavior |
|---|---|---|---|
| Burden Resistor (R_burden) | 33Ω (for 100A/50mA CT) | Open: CT secondary has infinite impedance. | CT core saturates, generating high-voltage spikes that can arc internally or destroy downstream op-amps. Fails blind/hazardous. |
| HPF Capacitor (C_hpf) | 10 nF (Film) | Short: DC bias path to ground. | Node C drops to 0V. ADC reads flatline. MCU detects sensor fault and triggers a nuisance trip (fails safe). |
| HPF Capacitor (C_hpf) | 10 nF (Film) | Open: Filter bypassed. | 60 Hz fundamental reaches op-amp. ADC saturates/clips. DSP interprets clipping edges as high-freq noise. Nuisance trips on normal loads. |
| DC Bias Divider | 2x 10kΩ to VCC/GND | Upper R Open: Bias lost. | Signal swings negative. Internal ADC protection diodes clamp, distorting waveform. MCU misses zero-crossing sync. |
| Feedback Resistor (R_f) | 47 kΩ (Gain set) | Short: Gain drops to 1. | Arc noise remains in millivolt range, below the ADC's noise floor (LSB quantization error). Fails blind to small series arcs. |
Design Walkthrough: Building an ESP32 Arc Signature Sniffer
Why use this CT + Active HPF topology over alternatives like a Rogowski coil? Rogowski coils output a voltage proportional to the derivative of current (di/dt), which naturally highlights high-frequency arcs. However, they require an analog integrator circuit to reconstruct the 60 Hz waveform for zero-crossing detection, which suffers from op-amp drift over time. The CT + HPF topology is vastly superior for low-cost embedded designs because the microcontroller can easily detect the 60 Hz zero-crossing directly from the biased Node B, while dedicating a second ADC channel purely to the amplified high-frequency noise at Node D.
Selected Component Values
- Microcontroller: ESP32-WROOM-32 (Dual-core, 12-bit SAR ADC capable of >1 MSPS sampling via I2S/DMA).
- Current Transformer: YHDC SCT-013-000 (100A primary / 50mA secondary, no internal burden).
- Burden Resistor: 33Ω 1% metal film (Yields ~1.65V peak at 100A primary).
- DC Bias: Two 10kΩ resistors + 100µF bypass capacitor to VCC/2.
- HPF Cutoff: 10 nF C0G capacitor + 1 kΩ resistor (f_c ≈ 15.9 kHz). C0G dielectric is critical here; X7R ceramics exhibit piezoelectric ringing that mimics arc noise.
- Op-Amp: MCP6002 (Rail-to-rail, adequate GBW for 100kHz signals). Gain set to 11x (R_f = 10kΩ, R_in = 1kΩ).
Step-by-Step Breadboard Verification
To verify the topology and test your DSP algorithm without touching mains voltage, we simulate the CT output using a function generator. A normal load is a clean 60 Hz sine wave; an arcing load is a 60 Hz sine wave with high-frequency "notches" or broadband noise superimposed near the zero-crossings.
- Inject the Simulated Waveform: Connect a function generator to Node A (through a 100Ω series resistor to simulate CT impedance). Set the generator to output a 60 Hz sine wave at 1Vpp, mixed with a 50 kHz noise burst at 20mVpp triggered at the zero-crossings.
- Verify Node B (Bias & Fundamental): Probe Node B with an oscilloscope. You should see a clean 60 Hz sine wave centered exactly at 1.65V DC. If the center drifts, check your 10kΩ bias divider tolerance.
- Verify Node C (HPF Action): Probe Node C. The 60 Hz fundamental should be attenuated by at least -40dB (nearly invisible), while the 50 kHz noise bursts remain visible, now centered at 1.65V.
- Verify Node D (Amplification): Probe the MCP6002 output. The 50 kHz noise bursts should now swing close to the 3.3V and 0V rails without clipping. If clipping occurs, reduce R_f.
- ESP32 ADC Sampling: Configure the ESP32's ADC via the ESP-IDF ADC Oneshot API or I2S DMA for continuous 200 kHz sampling. Run a 256-point FFT in firmware. You should see a distinct magnitude spike in the 15 kHz - 100 kHz bins during the noise bursts, confirming the MCU can "see" the arc.
Frequently Asked Questions
How does an arc fault circuit interrupter work differently than a GFCI?
A Ground Fault Circuit Interrupter (GFCI) uses a differential current transformer to measure the exact magnetic balance between the hot and neutral wires. If even 4 to 6 milliamps leak to ground (indicating a shock hazard), it trips. An AFCI, conversely, does not look for ground leakage; it analyzes the shape and frequency content of the current waveform itself to detect the chaotic, high-frequency plasma noise of an arc. Modern Combination-Type AFCIs often include GFCI circuitry on the same microcontroller die, but the detection physics are entirely distinct.
Why does my AFCI trip when I plug in a vacuum cleaner or power tool?
This is a classic DSP classification challenge. Universal motors (found in vacuums and drills) use carbon brushes that physically spark against the commutator during normal operation. This mechanical sparking generates the exact same high-frequency broadband noise as a dangerous parallel arc. Older AFCIs relied on simple analog thresholding and would nuisance-trip. Modern embedded AFCIs use machine learning or advanced wavelet transforms to analyze the repetition rate and phase angle of the noise. Brush noise is highly periodic and tied to motor RPM, while a true electrical arc is stochastic (random) and clustered near the voltage zero-crossings.
Can the microcontroller detect series vs. parallel arcs?
Yes, and this is the defining feature of a "Combination" AFCI (mandated by UL 1699 standards). A parallel arc (hot-to-neutral or hot-to-ground) draws massive current, making it easy to detect via high-frequency noise and overcurrent. A series arc (a broken wire in a loose connection) actually reduces the total RMS current flowing to the load, meaning a standard breaker will never trip. The microcontroller detects series arcs by looking for the specific high-frequency "shoulders" or sudden current drop-offs that occur when the plasma channel extinguishes and reignites every half-cycle, even if the overall RMS current is only 5 Amps.
