An ADC architecture is the underlying circuit topology—such as Successive Approximation Register (SAR), Sigma-Delta (ΣΔ), or Flash—that dictates how an analog voltage is sampled and converted into a discrete digital binary word. In a real circuit, your choice of architecture dictates the hard trade-offs between sampling speed (MSPS), resolution (bits), power draw, and conversion latency. Makers commonly confuse an ADC’s resolution (the theoretical number of bits, like 12-bit) with its accuracy (Effective Number of Bits, or ENOB), wrongly assuming a 16-bit SAR ADC will yield cleaner data than a 16-bit Sigma-Delta in a noisy environment.
The Core ADC Architectures and the Math That Matters
To pick the right silicon, you need to understand how the three dominant architectures actually convert voltage into numbers.
Successive Approximation Register (SAR)
Think of a SAR ADC as playing a game of 'higher or lower' with a binary search algorithm. It uses a single comparator and an internal digital-to-analog converter (DAC). It sets the most significant bit (MSB) to 1, compares the resulting voltage to your input, and keeps or clears the bit based on the result. It repeats this for every bit down the line.
- Speed: Medium (100 kSPS to 5 MSPS).
- Resolution: Medium (8 to 18 bits).
- Power: Low to Medium. Power scales linearly with sample rate.
Sigma-Delta (ΣΔ)
Instead of measuring the absolute voltage directly, a Sigma-Delta ADC measures the difference (delta) between the input and a 1-bit DAC output, accumulating (sigma) these differences over time at a massive oversampling rate. A digital decimation filter then crunches this high-speed bitstream into a lower-speed, high-resolution word.
- Speed: Slow (10 SPS to 1 MSPS).
- Resolution: High (16 to 32 bits).
- Power: Medium. The digital filter draws constant current regardless of output data rate.
Flash and Pipeline
Flash ADCs use a resistor ladder and a dedicated comparator for every single possible voltage step simultaneously. A 8-bit Flash ADC requires 255 comparators firing at the exact same instant. Pipeline architectures cascade lower-resolution flash stages to achieve higher bits at high speeds.
- Speed: Ultra-fast (10 MSPS to >1 GSPS).
- Resolution: Low to Medium (6 to 14 bits).
- Power: Very High.
Let’s compare a 3.3V reference on two common hobbyist setups: the internal 12-bit SAR ADC on an ESP32, and an external 16-bit Sigma-Delta ADS1115.
ESP32 Internal SAR (12-bit):
Least Significant Bit (LSB) = 3.3V / 2^12 = 3.3V / 4096 = 0.805 mV per step.
Conversion time: ~1 µs (capable of 1 MSPS, though practically limited by API overhead to ~10-20 kSPS).
ADS1115 Sigma-Delta (16-bit signed, 15-bit positive range):
LSB = 3.3V / 2^15 = 3.3V / 32768 = 0.100 mV per step.
Conversion time: At the default 128 SPS data rate, it takes ~7.8 ms per sample.
The ADS1115 gives you 8x finer voltage steps, but it is 7,800 times slower. If you are reading a 1 kHz audio signal, the ADS1115 will fail entirely (violating the Nyquist theorem), while the ESP32 SAR will capture it easily.
Where You Meet ADC Architectures in Practice
You don't choose an architecture in a vacuum; you choose it based on the physical phenomenon you are measuring.
- Battery Voltage & Potentiometers (SAR): You need to read a slowly changing DC voltage a few times a second. The internal SAR ADC on an Arduino Uno (ATmega328P) or ESP32 is perfect here. It’s fast enough, free, and requires no external wiring.
- Load Cells, Thermocouples, & Strain Gauges (Sigma-Delta): These sensors output tiny, slow-moving differential signals buried in millivolt noise. A 24-bit Sigma-Delta like the HX711 (for load cells) or ADS124S08 provides the massive resolution and built-in programmable gain amplifiers (PGA) required to extract the signal without external op-amps.
- Software Defined Radio (SDR) & Oscilloscopes (Flash/Pipeline): Capturing RF envelopes or fast transient spikes requires sampling millions of times per second. You will find 8-bit Flash or 12-bit Pipeline ADCs (like the AD9288) on the front end of hobbyist oscilloscope shields and RTL-SDR dongles.
Resolution vs. ENOB: The Datasheet Trap
The most expensive mistake embedded builders make is buying a '16-bit' ADC and expecting 16 bits of clean data. Datasheets market resolution (the size of the digital register), but physics dictates accuracy.
Enter Effective Number of Bits (ENOB). ENOB accounts for thermal noise, quantization error, clock jitter, and non-linearity. You can calculate the theoretical Signal-to-Noise and Distortion ratio (SINAD) using the formula: ENOB = (SINAD - 1.76) / 6.02.
The ESP32 features a 12-bit SAR ADC, but its ENOB is notoriously poor—often hovering around 9 to 10 bits due to internal silicon noise and non-linearity near the 0V and 3.3V rails. Furthermore, the ADC2 pins share hardware with the WiFi radio. If you call WiFi.begin() in your sketch, ADC2 reads will fail or return garbage. Always use ADC1 pins (GPIO32-39) for analog reads when WiFi is active, and add a 100nF bypass capacitor directly at the ADC pin to reduce high-frequency noise.
If your project requires true 16-bit precision (like a 4-20mA industrial current loop sensor), an internal microcontroller ADC will fail you. You must step out to an external Sigma-Delta chip via I2C or SPI.
Decision Tree: Picking Your ADC Architecture and Part Number
Use this matrix to terminate your design choices. Match your sensor's physical requirements to the architecture, then buy the specific part.
| If your project needs... | Choose Architecture | Communication | Concrete Part Pick |
|---|---|---|---|
| High precision (16+ bits), slow signals (<100 Hz), differential inputs (load cells, thermocouples) | Sigma-Delta (ΣΔ) | I2C / SPI | ADS1115 (16-bit, 4-ch) or HX711 (24-bit load cell) |
| Medium precision (12 bits), medium speed (1-10 kHz), multiple single-ended channels (pots, joysticks) | SAR | SPI | MCP3208 (12-bit, 8-ch) or internal MCU ADC |
| High speed (>1 MSPS), low precision (8-10 bits), capturing waveforms or RF envelopes | Flash / Pipeline | Parallel / LVDS | AD9288 (8-bit, 100 MSPS dual) |
| Ultra-low power, wearable/battery-powered, occasional sensor polling | SAR | I2C / SPI | ADS7142 (16-bit, nano-power SAR) |
The Default Recommendation: If you are paralyzed by choice and just need a reliable, breadboard-friendly external ADC for general precision sensor work, buy the ADS1115. It is cheap (~$3 on a breakout board), uses I2C, has a built-in PGA, and its Sigma-Delta architecture filters out the high-frequency switching noise that plagues hobbyist breadboards.
Frequently Asked Questions
Can I use the ESP32 internal SAR ADC for audio sampling?
Technically yes, but practically no. The ESP32's internal ADC suffers from severe non-linearity and a high noise floor (ENOB ~9 bits). For audio, you will hear a distinct quantization hiss. Use an external I2S ADC like the INMP441 (for digital MEMS mics) or the PCM1808 (for analog line-in) to bypass the internal SAR entirely.
Why does my Sigma-Delta ADC read garbage when I switch channels quickly?
Sigma-Delta ADCs rely on digital decimation filters that take time to 'settle' after a multiplexer switches the input channel. If you cycle through channels faster than the filter settling time (often 3-4 conversion cycles), your readings will be corrupted by the previous channel's voltage. Check the datasheet for the 'settling time' spec and add a delay in your code, or use a SAR ADC which settles in a single clock cycle.
Do I need a voltage reference IC for my ADC?
If you are using the microcontroller's VCC (3.3V or 5V) as the ADC reference, any noise on your power rail directly injects into your ADC readings. For 8-bit or 10-bit work, VCC is fine. For 12-bit and above, use a dedicated low-noise voltage reference IC like the REF3033 (3.3V) to anchor your ADC's top rail.
