Deriving clean analog rails from a 12V, 24V, or 48V battery or solar bus is a notorious pain point in precision electronics. If you are building a battery management system (BMS) telemetry board, a solar charge controller current-shunt amplifier, or an environmental sensor node, your operational amplifiers require ultra-low noise power. However, the DC bus powering these systems is anything but clean. Inverter switching harmonics, MPPT charge controller PWM pulses, and alternator whine inject millivolts of high-frequency noise directly into the supply lines.
An op amp power supply must bridge this gap: stepping down a high-voltage, noisy battery bus into a tightly regulated, microvolt-quiet dual rail (typically ±5V or ±12V) without dissipating excessive heat. This guide details the exact topology, component selection, and thermal math required to build a hybrid power supply for a 24V nominal LiFePO4 system.
Topology Selection: Linear vs. Switching vs. Hybrid
The fundamental conflict in power supply design is efficiency versus noise. A pure linear regulator drops excess voltage as heat, while a pure switching regulator chops voltage efficiently but leaves switching ripple on the output. For precision analog loads drawing under 100mA, the hybrid topology is the undisputed winner.
| Topology | Efficiency | Heat Dissipation (Total) | Output Noise & Ripple | Component Cost |
|---|---|---|---|---|
| Pure Linear (LDO) | ~17% | High (~2.4W total) | Ultra-Low (nV/√Hz) | Low ($1.50) |
| Pure Switching (Buck/Inverting) | ~82% | Low (~0.25W total) | High (10mV - 50mV p-p) | Medium ($4.00) |
| Hybrid (Switcher + Ultra-Low LDO) | ~78% | Low (~0.35W total) | Ultra-Low (< 2µV RMS) | High ($7.50) |
A pure linear approach stepping 29.2V (maximum 8S LiFePO4 absorption voltage) down to 5V at 50mA burns (29.2V - 5V) × 0.05A = 1.21W per rail. That is 2.42W of heat trapped in a small PCB area, requiring massive heatsinks and destroying battery life in off-grid systems. The hybrid approach uses a switching pre-regulator to drop the bulk of the voltage, leaving just 1V of headroom for an ultra-low noise LDO to clean up the switching ripple.
Design Example: 24V Bus to ±5V Precision Analog Rail
This design targets an 8S LiFePO4 battery bus (20.0V discharged to 29.2V fully charged) powering a quad precision op-amp like the Texas Instruments OPA4277 for shunt current sensing. The load requires ±5V at 50mA per rail.
Component Selection and Spec Sheet
| Stage | Function | Part Number | Target Output | Key Specification |
|---|---|---|---|---|
| Input Protection | Reverse Polarity & TVS | LM74800 + SMBJ33A | N/A | Clamps at 33V, 20mV drop |
| Pos. Pre-Regulator | Step-Down Switcher | TPS54360 | +6.0V | 500kHz switching, 3.5A limit |
| Pos. LDO | Ultra-Low Noise Regulator | LT3045 | +5.0V | 0.8µV RMS noise, 76dB PSRR |
| Neg. Pre-Regulator | Inverting Buck-Boost | TPS54360 (Inv. Config) | -6.0V | Generates negative rail |
| Neg. LDO | Negative Ultra-Low LDO | TPS7A30 | -5.0V | 16µV RMS noise, 72dB PSRR |
Thermal and Derating Analysis
Let us calculate the worst-case thermal load at maximum battery voltage (29.2V) and maximum load (50mA per rail).
- Positive Switcher (TPS54360): Drops 29.2V to 6.0V. Power dissipated is roughly (29.2V - 6.0V) × 0.05A = 1.16W. The TPS54360 in a SOIC-8 package with a thermal pad and adequate PCB copper pour has a junction-to-ambient thermal resistance (θJA) of roughly 40°C/W. Temperature rise = 1.16W × 40°C/W = 46.4°C. At a 30°C ambient environment, the junction sits at 76.4°C, well below the 150°C maximum limit.
- Positive LDO (LT3045): Drops 6.0V to 5.0V. Power dissipated is (6.0V - 5.0V) × 0.05A = 0.05W (50mW). The thermal rise is negligible. The LDO runs completely cool, which is critical because LDO thermal noise increases with junction temperature.
- Negative Rail: The inverting buck-boost topology is slightly less efficient (~75%), generating roughly 1.4W of heat on the switcher IC. Ensure the negative switcher has its own dedicated thermal vias to the back copper pour to prevent localized hot spots that could drift the analog ground reference.
Ripple, Noise, and PSRR Expectations
Switching regulators generate sawtooth ripple at their switching frequency and its harmonics. The TPS54360 running at 500kHz will produce approximately 30mV peak-to-peak ripple on the 6.0V intermediate rail. If fed directly to an op-amp, this ripple will couple into the signal path, destroying the resolution of a 16-bit or 24-bit ADC.
This is where the LDO's Power Supply Rejection Ratio (PSRR) acts as an active filter. The LT3045 boasts a PSRR of 76dB at 500kHz. To calculate the residual ripple, we convert the decibel attenuation to a linear ratio: 76dB equates to a voltage attenuation factor of roughly 6,300. Dividing the 30mV switcher ripple by 6,300 yields an output ripple of 4.7µV peak-to-peak. This is substantially below the intrinsic noise floor of most precision op-amps, rendering the switching noise effectively invisible to the analog signal chain.
Op Amp Power Supply FAQ
How much headroom does an op amp power supply LDO actually need?
There is a critical difference between dropout voltage and PSRR headroom. The LT3045 has a maximum dropout voltage of 260mV at 500mA (and much less at 50mA). Technically, if your input is 5.1V, it will not drop out and will still output 5.0V. However, an LDO requires sufficient drain-to-source voltage (VDS) across its internal pass transistor to actively regulate and reject high-frequency AC noise. If you operate an LDO with only 100mV of headroom, its high-frequency PSRR will collapse, allowing switcher ripple to pass straight through. For optimal noise rejection in an op amp power supply, always design for a minimum of 500mV to 1.0V of headroom between the pre-regulator output and the LDO output.
Can I use a single-rail battery to power a dual-rail op amp circuit?
Yes, but the method you choose dictates your noise floor. You have three options to generate a negative rail from a single positive battery bus: 1. Virtual Ground (Rail Splitter): Using an IC like the TLE2426 to create a mid-point reference (e.g., calling 12V "ground" and 24V "+12V"). This is cheap but halves your available voltage swing and offers poor high-frequency PSRR. 2. Isolated DC-DC Converter: Using a module like the TRACO Power TEL series to generate an isolated -5V. Excellent noise isolation, but expensive and physically large. 3. Inverting Buck-Boost: The topology used in this guide. It is the best compromise for custom PCBs, offering high efficiency and tight regulation when followed by a negative LDO like the TPS7A30.
What is the acceptable ripple voltage for precision op amp power supplies?
Acceptable ripple is entirely dependent on your signal chain resolution and the op-amp's own PSRR. A general rule of thumb for 16-bit ADC systems is to keep power rail ripple below 10mV peak-to-peak. For 24-bit systems (like precision load cells or RTD temperature sensors), you should target below 50µV peak-to-peak. Always check the op-amp datasheet's PSRR curve; many general-purpose op-amps (like the LM358) have PSRR that degrades to 0dB above 100kHz, meaning they will pass high-frequency switcher ripple directly to the output pin regardless of how clean your DC baseline is. Always pair low-noise LDOs with precision op-amps that maintain high PSRR into the MHz range.
